SN74ABT7819A

512

× 18 × 2

CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

SCBS756 – MAY 2002

6

POST OFFICE BOX 655303

enable logic diagram (positive logic)

CSA

W/RA

WENA

RENA

WEN FIFOA–B

A0–A17 (output enable)

REN FIFOB–A

CSB

W/RB

WENB

RENB

WEN FIFOB–A

B0–B17 (output enable)

REN FIFOA–B

Terminal Functions

TERMINAL†

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

A0–A17

7, 8, 10, 11,

13, 14, 16, 17,

19, 20, 22, 23,

25, 26, 28, 29,

31, 32

I/O

Port-A data. The 18-bit bidirectional data port for side A.

AF/AEA

3

O

FIFOA–B almost-full/almost-empty flag. Depth offsets can be programmed for AF/AEA or the default

value of 128 can be used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AEA is

high when X or fewer words or (512 – Y) or more words are stored in FIFOA–B. AF/AEA is forced high

when FIFOA–B is reset.

AF/AEB

62

O

FIFOB–A almost-full/almost-empty flag. Depth offsets can be programmed for AF/AEB or the default

value of 128 can be used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AEB is

high when X or fewer words or (512 – Y) or more words are stored in FIFOB–A. AF/AEB is forced high

when FIFOB–A is reset.

B0–B17

58, 57, 55, 54,

52, 51, 49, 48,

46, 45, 43, 42,

40, 39, 37, 36,

34, 33

I/O

Port-B data. The 18-bit bidirectional data port for side B.

CLKA

76

I

Port-A clock. CLKA is a continuous clock that synchronizes all data transfers through port A to its

low-to-high transition and can be asynchronous or coincident to CLKB.

CLKB

69

I

Port-B clock. CLKB is a continuous clock that synchronizes all data transfers through port B to its

low-to-high transition and can be asynchronous or coincident to CLKA.

CSA

80

I

Port-A chip select. CSA must be low to enable a low-to-high transition of CLKA to either write data from

A0–A17 to FIFOA–B or read data from FIFOB–A to A0–A17. The A0–A17 outputs are in the

high-impedance state when CSA is high.

CSB

65

I

Port-B chip select. CSB must be low to enable a low-to-high transition of CLKB to either write data from

B0–B17 to FIFOB–A or read data from FIFOA–B to B0–B17. The B0–B17 outputs are in the

high-impedance state when CSB is high.

† Terminal numbers are for the PH package.