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74LVC16240ADL 데이터시트(PDF) 6 Page - NXP Semiconductors |
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74LVC16240ADL 데이터시트(HTML) 6 Page - NXP Semiconductors |
6 / 10 page Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) 1997 Jul 29 6 AC WAVEFORMS VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V SW00045 An INPUT VM tPHL tPLH VOL VI VM GND VOH Yn OUTPUT Waveform 1. Input (An) to output (Yn) propagation delay times tPLZ tPZL VI OE INPUT GND VCC Qn OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH Qn OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SW00046 Waveform 2. 3-State enable and disable times TEST CIRCUIT PULSE GENERATOR RT VIN D.U.T. VOUT CL VCC RL=500 Ω SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 2 <VCC tPHZ/tPZH GND Test Circuit for 3-State Outputs Open GND S1 2 <VCC DEFINITIONS VCC t 2.7V 2.7 – 3.6V VIN VCC 2.7V RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00047 RL=500 Ω Waveform 3. Load circuitry for switching times |
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