MOTOROLA CMOS LOGIC DATA

5

MC14530B

BASIC COMBINATIONAL FUNCTIONS

5–INPUT MAJORITY LOGIC GATE APPLICATIONS

DOUBLING THE WEIGHT OF INPUT VARIABLE A

BY TYING IT TO ANY TWO INPUTS

CORRELATION OF MULTIPLE SAMPLES

WITH A TEST BIT

The gate will have a “1” output if

the test bit To matches or corre-

lates with 3, 4 or 5 of the sample

bits S0–S4.

1. Majority Logic Gate Array

yielding the symmetric function

of 1 thru 7 variables true, out

of 7 input variables (X1... X7)

(e.g., if any two–input variables

are true (logical “1”), Z1 and

Z2 are true (logical “1”)

Each package labeled M5 is a single majority logic gate

using five inputs, A thru E, and one output Z.

A

W

0

B

C

D

E

M5

Z

A

W

1

B

C

D

E

M5

Z

A

W

0

B

C

M3

Z

1

0

A

W

1

B

C

M3

Z

1

0

A

W

1

B

C

OR3

Z

1

1

A

W

0

B

C

NOR3

Z

1

1

A

W

1

B

C

AND3

Z

0

0

A

W

0

B

C

NAND3

Z

0

0

5–INPUT MAJORITY GATES

3–INPUT MAJORITY GATES

3–INPUT OR GATE

3–INPUT AND GATE

3–INPUT NAND GATE

3–INPUT NOR GATE

A

B

C

D

E

M5

A

B

C

D

E

M5

A

B

C

D

E

M5

A

B

C

D

E

M5

A

B

C

D

E

M5

A

B

C

D

E

M5

A

B

C

D

E

M5

M5

M5

M5

M5

M5

M5

M5

M5

Z1

Z2

Z3

Z4

Z5

Z6

Z7

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

X1

X4

X6

X7

X5

X3

X2

A

A

B

C

D

Z

Z

Z

Z

W

W

A

B

C

D

E

To

W

W

W

S0

S1

S2

S3

S4

A

B

C

D

E

To

S0

S1

S2

S3

A

B

C

D

E

To

To

S0

S1

S2

CORRELATION OF 100%

CORRELATION OF 75%, 100%

CORRELATION OF 60%, 80%, 100%

(AB + AC + AD + BCD)

 W

To

To