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74LVT543DB 데이터시트(PDF) 2 Page - NXP Semiconductors

부품명 74LVT543DB
상세설명  3.3V Octal latched transceiver with dual enable 3-State
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVT543
3.3V Octal latched transceiver with dual enable
(3-State)
2
1998 Feb 19
853-1749 18988
FEATURES
Combines 74LVT245 and 74LVT373 type functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Output capability: +64mA/–32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT543 is a high-performance BiCMOS product designed for
VCC operation at 3.3V.
This device contains two sets of D-type latches for temporary
storage of data flowing in either direction. Separate Latch Enable
(LEAB, LEBA) and Output Enable (OEAB, OEBA) inputs are
provided for each register to permit independent control of data
transfer in either direction. The outputs are guaranteed to sink
64mA.
FUNCTIONAL DESCRIPTION
The 74LVT543 contains two sets of eight D–type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
An to Bn or Bn to An
CL = 50pF;
VCC = 3.3V
2.3
3.0
ns
CIN
Input capacitance
VI = 0V or 3.0V
4
pF
CI/O
I/O capacitance
Outputs disabled; VI/O = 0V or 3.0V
10
pF
ICCZ
Total supply current
Outputs disabled; VCC = 3.6V
0.13
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic SOL
–40
°C to +85°C
74LVT543 D
74LVT543 D
SOT137-1
24-Pin Plastic SSOP Type II
–40
°C to +85°C
74LVT543 DB
74LVT543 DB
SOT340-1
24-Pin Plastic TSSOP Type I
–40
°C to +85°C
74LVT543 PW
74LVT543PW DH
SOT355-1
PIN CONFIGURATION
24
23
22
21
20
19
18
17
16
10
15
9
8
7
6
5
4
3
2
1
VCC
EBA
B0
B1
B2
B3
B4
B5
B6
B7
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
LEBA
14
12
13
11
LEAB
OEAB
EAB
GND
SV00026
LOGIC SYMBOL
21
22
B0 B1 B2
19
20
B3
345
6
A0 A1 A2 A3
11
23
17
18
B4 B5 B6
15
16
B7
789
10
A4 A5 A6 A7
EAB
EBA
14
LEAB
1
LEBA
13
OEAB
2
OEBA
SV00027


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