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AD61009 데이터시트(PDF) 2 Page - Analog Devices

부품명 AD61009
상세설명  Low Power Mixer 3 V Receiver IF Subsystem
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AD61009–SPECIFICATIONS
REV. 0
–2–
(@ TA = 25 C, Supply = 3.0 V, IF = 10.7 MHz, unless otherwise noted)
Model
AD61009ARS
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
MIXER
Maximum RF and LO Frequency Range
For Conversion Gain > 20 dB
500
MHz
Maximum Mixer Input Voltage
For Linear Operation; Between RFHI and RFLO
±54
mV
Input 1 dB Compression Point
RF Input Terminated in 50
–15
dBm
Input Third-Order Intercept
RF Input Terminated in 50
–5
dBm
Noise Figure
Matched Input, Max Gain, f = 83 MHz, IF = 10.7 MHz
14
dB
Matched Input, Max Gain, f = 144 MHz, IF = 10.7 MHz
12
dB
Maximum Output Voltage at MXOP
ZIF = 165
Ω, at Input Compression
±1.3
V
Mixer Output Bandwidth at MXOP
–3 dB, ZIF = 165
45
MHz
LO Drive Level
Mixer LO Input Terminated in 50
–16
dBm
LO Input Impedance
LOIP to VMID
1
k
Isolation, RF to IF
RF = 240 MHz, IF = 10.7 MHz, LO = 229.3 MHz
30
dB
Isolation, LO to IF
RF = 240 MHz, IF = 10.7 MHz, LO = 229.3 MHz
20
dB
Isolation, LO to RF
RF = 240 MHz, IF = 10.7 MHz, LO = 229.3 MHz
40
dB
Isolation, IF to RF
RF = 240 MHz, IF = 10.7 MHz, LO = 229.3 MHz
70
dB
IF AMPLIFIERS
Noise Figure
Max Gain, f = 10.7 MHz
17
dB
Input 1 dB Compression Point
IF = 10.7 MHz
–15
dBm
Output Third-Order Intercept
IF = 10.7 MHz
18
dBm
Maximum IF Output Voltage at IFOP
ZIF = 600
Ω±560
mV
Output Resistance at IFOP
From IFOP to VMID
15
Bandwidth
–3 dB at IFOP, Max Gain
45
MHz
GAIN CONTROL
(See Figures 10 and 11)
Gain Control Range
Mixer + IF Section, GREF to 1.5 V
90
dB
Gain Scaling
GREF to 1.5 V
20
mV/dB
GREF to General Reference Voltage VR
75/VR
dB/V
Gain Scaling Accuracy
GREF to 1.5 V, 80 dB Span
±1dB
Bias Current at GAIN
5
µA
Bias Current at GREF
1
µA
Input Resistance at GAIN, GREF
1M
I AND Q DEMODULATORS
Required DC Bias at DMIP
VPOS/2
V dc
Input Resistance at DMIP
From DMIP to VMID
50
k
Input Bias Current at DMIP
2
µA
Maximum Input Voltage
IF > 3 MHz
±150
mV
IF
≤ 3 MHz
±75
mV
Amplitude Balance
IF = 10.7 MHz, Outputs at 600 mV p-p, F = 100 kHz
±0.2
dB
Quadrature Error
IF = 10.7 MHz, Outputs at 600 mV p-p, F = 100 kHz
–3.5
–1.2
+1.5
Degrees
Phase Noise in Degrees
IF = 10.7 MHz, F = 10 kHz
–100
dBc/Hz
Demodulation Gain
Sine Wave Input, Baseband Output
17.4
18
18.8
dB
Maximum Output Voltage
RL
≥ 20 kΩ±1.23
V
Output Offset Voltage
Measured from IOUT, QOUT to VMID
–100
10
+100
mV
Output Bandwidth
Sine Wave Input, Baseband Output
1.5
MHz
PLL
Required DC Bias at FDIN
VPOS/2
V dc
Input Resistance at FDIN
From FDIN to VMID
50
k
Input Bias Current at FDIN
200
nA
Frequency Range
1.0 to 12
MHz
Required Input Drive Level
Sine Wave Input at Pin 1
400
mV
Acquisition Time to
±3°
IF = 10.7 MHz
16.5
µs
POWER-DOWN INTERFACE
Logical Threshold
For Power Up on Logical High
2
V dc
Input Current for Logical High
75
µA
Turn-On Response Time
To PLL Locked
16.5
µs
Standby Current
550
µA
POWER SUPPLY
Supply Range
2.85
5.5
V
Supply Current
8.5
12.5
mA
OPERATING TEMPERATURE
TMIN to TMAX
Operation to 2.85 V Minimum Supply Voltage
–25
+85
°C
Operation to 4.5 V Minimum Supply Voltage
–40
+85
°C
Specifications subject to change without notice.


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