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L6382DTR 데이터시트(PDF) 2 Page - STMicroelectronics |
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L6382DTR 데이터시트(HTML) 2 Page - STMicroelectronics |
2 / 14 page L6382D 2/14 in particular the L6382D embeds one driver for the PFC pre-regulator stage, two drivers for the ballast half- bridge stage (High Voltage, including also the bootstrap function) and the last one to provide supplemen- tary features like preheating of filaments supplied through isolated filaments in dimmable applications. A precise reference voltage (+3.3V ±1%) able to provide up to 30mA is available to supply the µC in op- erating mode. Instead, during start-up and save mode the current available at VREF is up to 10mA and it is provided by the internal high voltage start-up generator. The chip has been conceived with advanced power management logic to minimize power losses and in- crease the application reliability. In the half-bridge section, a patented integrated bootstrap section replaces the external bootstrap diode. The L6382D integrates also a function that regulates the IC supply voltage (without the need of any exter- nal charge pump) and optimizes the current consumption. Figure 3. Pin Connection (Top View) Figure 4. Typical System Block Diagram 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 PFI LSI HSI HEI PFG N.C. TPR GND LSG VCC VREF CSI CSO HEG N.C. HVSU N.C. OUT HSG BOOT 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 PFI LSI HSI HEI PFG N.C. TPR GND LSG VCC VREF CSI CSO HEG N.C. HVSU N.C. OUT HSG BOOT HV START-UP CHARGE PUMP REGULATOR BOOTSTRAP HB DRIVER PROTECTION 3.3V SUPPLY PFC DRIVER PFC CIRCUIT µ C AC MAINS TL |
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