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74LVX02 데이터시트(HTML) 4 Page - STMicroelectronics

부품명 74LVX02
상세내용  LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS
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제조사  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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74LVX02 데이터시트(HTML) 4 Page - STMicroelectronics

 
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Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
± 0.3V
Table 9: Capacitive Characteristics
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
Figure 3: Test Circuit
CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
CL
(pF)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tPLH tPHL Propagation Delay
Time
2.7
15
5.9
10.7
1.0
13.5
1.0
15.0
ns
2.7
50
8.4
14.2
1.0
17.0
1.0
19.0
3.3(*)
15
4.5
6.6
1.0
8.0
1.0
10.0
3.3(*)
50
7.0
10.1
1.0
11.5
1.0
13.0
tOSLH
tOSHL
Output To Output
Skew Time (note1,
2)
2.7
50
0.5
1.0
1.5
1.5
ns
3.3(*)
50
0.5
1.0
1.5
1.5
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
3.3
4
10
10
10
pF
CPD
Power Dissipation
Capacitance
(note 1)
3.3
15
pF


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