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74AUP1G332GF 데이터시트(PDF) 10 Page - NXP Semiconductors |
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74AUP1G332GF 데이터시트(HTML) 10 Page - NXP Semiconductors |
10 / 18 page 74AUP1G332_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01.00 — 27 February 2006 10 of 18 Philips Semiconductors 74AUP1G332 Low-power 3-input OR gate [1] All typical values are measured at nominal VCC. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. [3] The condition is VI = GND to VCC. Tamb = 25 °C CPD power dissipation capacitance f = 1 MHz [2] [3] VCC = 0.8 V - 3.1 - pF VCC = 1.1 V to 1.3 V - 3.2 - pF VCC = 1.4 V to 1.6 V - 3.2 - pF VCC = 1.65 V to 1.95 V - 3.4 - pF VCC = 2.3 V to 2.7 V - 3.8 - pF VCC = 3.0 V to 3.6 V - 4.3 - pF Table 9: Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol Parameter Conditions Min Typ [1] Max Unit Table 10: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max CL = 5 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V 2.0 10.3 2.0 10.3 ns VCC = 1.4 V to 1.6 V 1.9 6.4 1.9 6.6 ns VCC = 1.65 V to 1.95 V 1.4 5.2 1.4 5.4 ns VCC = 2.3 V to 2.7 V 1.2 3.7 1.2 3.9 ns VCC = 3.0 V to 3.6 V 1.1 3.1 1.1 3.3 ns CL = 10 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 7 VCC = 1.1 V to 1.3 V 2.4 12.0 2.4 12.0 ns VCC = 1.4 V to 1.6 V 2.0 7.3 2.0 7.6 ns VCC = 1.65 V to 1.95 V 1.9 5.8 1.9 6.1 ns VCC = 2.3 V to 2.7 V 1.5 4.5 1.5 4.7 ns VCC = 3.0 V to 3.6 V 1.4 3.9 1.4 4.1 ns |
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