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3 / 76 page November 11, 2004 S71AL016D_02_04_00_A1 3 Ad vance Info rmat i o n TABLE OF CONTENTS S71AL016D based MCPs Distinctive Characteristics . . . . . . . . . . . . . . . . . . . 1 MCP Features ........................................................................................................ 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . 1 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .2 16 Mb Flash Memory .............................................................................................2 Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . .6 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .8 Valid Combinations . . . . . . . . . . . . . . . . . . . . . . . . .9 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 10 TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7 mm Package ............................................................................................... 10 S29AL016D General Description 12 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 1. S29AL016D Device Bus Operations .......................... 15 Word/Byte Configuration .................................................................................15 Requirements for Reading Array Data ..........................................................15 Writing Commands/Command Sequences ................................................. 16 Program and Erase Operation Status ........................................................... 16 Standby Mode ....................................................................................................... 16 Automatic Sleep Mode .......................................................................................17 RESET#: Hardware Reset Pin ..........................................................................17 Output Disable Mode .........................................................................................17 Table 2. Sector Address Tables (Top Boot Device) ................. 18 Table 3. Sector Address Tables (Bottom Boot Device) ............ 19 Autoselect Mode ................................................................................................ 20 Table 4. S29AL016D Autoselect Codes (High Voltage Method) . 20 Sector Protection/Unprotection ................................................................... 20 Temporary Sector Unprotect ......................................................................... 21 Figure 1. Temporary Sector Unprotect Operation.................... 21 Figure 2. In-System Sector Protect/Unprotect Algorithms ........ 22 Common Flash Memory Interface (CFI) . . . . . . .23 Table 5. CFI Query Identification String ................................ 23 Table 6. System Interface String ......................................... 24 Table 7. Device Geometry Definition .................................... 24 Table 8. Primary Vendor-Specific Extended Query ................. 25 Hardware Data Protection ..............................................................................25 Low VCC Write Inhibit ..................................................................................25 Write Pulse “Glitch” Protection ................................................................25 Logical Inhibit .................................................................................................. 26 Power-Up Write Inhibit ............................................................................... 26 Reading Array Data ............................................................................................27 Reset Command ..................................................................................................27 Autoselect Command Sequence ....................................................................27 Word/Byte Program Command Sequence ................................................ 28 Unlock Bypass Command Sequence ........................................................ 28 Figure 3. Program Operation................................................ 29 Chip Erase Command Sequence ................................................................... 29 Sector Erase Command Sequence ................................................................ 30 Erase Suspend/Erase Resume Commands ....................................................31 Figure 4. Erase Operation.................................................... 32 Command Definitions ........................................................................................33 Table 9. S29AL016D Command Definitions ........................... 33 Write Operation Status . . . . . . . . . . . . . . . . . . . . 34 DQ7: Data# Polling ............................................................................................ 34 Figure 5. Data# Polling Algorithm ........................................ 35 RY/BY#: Ready/Busy# ....................................................................................... 35 DQ6: Toggle Bit I ............................................................................................... 36 DQ2: Toggle Bit II .............................................................................................. 36 Reading Toggle Bits DQ6/DQ2 ..................................................................... 37 Figure 6. Toggle Bit Algorithm............................................. 38 DQ5: Exceeded Timing Limits ........................................................................ 38 DQ3: Sector Erase Timer ................................................................................ 39 Table 10. Write Operation Status ......................................... 39 Figure 7. Maximum Negative Overshoot Waveform ................ 40 Figure 8. Maximum Positive Overshoot Waveform.................. 40 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 9. ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents).................................................. 42 Figure 10. Typical ICC1 vs. Frequency................................... 43 Figure 11. Test Setup......................................................... 44 Table 11. Test Specifications ............................................... 44 Figure 12. Input Waveforms and Measurement Levels ............ 45 Read Operations .................................................................................................46 Figure 13. Read Operations Timings..................................... 46 Hardware Reset (RESET#) .............................................................................. 47 Figure 14. RESET# Timings................................................. 47 Word/Byte Configuration (BYTE#) ...........................................................48 Figure 15. BYTE# Timings for Read Operations...................... 48 Figure 16. BYTE# Timings for Write Operations ..................... 49 Erase/Program Operations ..............................................................................50 Figure 17. Program Operation Timings ................................. 51 Figure 18. Chip/Sector Erase Operation Timings .................... 52 Figure 19. Data# Polling Timings (During Embedded Algorithms).. 53 Figure 20. Toggle Bit Timings (During Embedded Algorithms).. 53 Figure 21. DQ2 vs. DQ6 for Erase and Erase Suspend Operations . 54 Figure 22. Temporary Sector Unprotect/Timing Diagram......... 54 Figure 23. Sector Protect/Unprotect Timing Diagram.............. 55 Figure 24. Alternate CE# Controlled Write Operation Timings .. 57 TSOP and BGA Pin Capacitance . . . . . . . . . . . . 58 2Mbit Type 1 SRAM Common Features . . . . . . . . . . . . . . . . . . . . . . . . 59 Functional Description . . . . . . . . . . . . . . . . . . . . . 60 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 These parameters are verified in device characterization and are not 100% tested. . . . . . 60 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 60 Operating Characteristics (Over Specified Temperature Range) . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 1. Power Savings with Page Mode (WE# = VIH) ........... 62 Timing Test Conditions . . . . . . . . . . . . . . . . . . . . 62 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 2. Timing of Read Cycle (CE# = OE# = VIL, WE# = CE2= VIH)................................................................................. 64 Figure 3. Timing Waveform of Read Cycle (WE# = VIH).......... 64 Figure 4. Timing Waveform of Write Cycle (WE# Control) ....... 65 Figure 5. Timing Waveform of Write Cycle (CE1# Control) ...... 65 |
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