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S71AL016D 데이터시트(HTML) 58 Page - SPANSION

부품명 S71AL016D
상세내용  Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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S71AL016D 데이터시트(HTML) 58 Page - SPANSION

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S29AL016D
S29AL016D_00_A1_E August 4, 2004
Advan ce
In form ati o n
Erase and Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25
°C, VCC = 3.0 V, 100,000 cycles, checkerboard
data pattern.
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
bytes program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
command. See Table 9 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 100,000 cycles per sector.
TSOP and BGA Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions TA = 25°C, f = 1.0 MHz.
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.7
10
s
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
25
s
Byte Programming Time
5
150
µs
Excludes system level
overhead (Note 5)
Word Programming Time
7
210
µs
Chip Programming Time
(Note 3)
Byte Mode
11
33
s
Word Mode
7.2
21.6
s
Parameter
Symbol
Parameter Description
Test Setup
Package
Typ
Max
Unit
CIN
Input Capacitance
VIN = 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
COUT
Output Capacitance
VOUT = 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
CIN2
Control Pin Capacitance
VIN = 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF


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