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S71GLXXXNC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 64 Page - SPANSION

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S29GLxxxN MirrorBitTM Flash Family
S29GLxxxN_MCP_A1 December 15, 2004
Advan ce
In form ati o n
Table 9. System Interface String
Addresses
(x16)
Data
Description
1Bh
0027h
VCC Min. (write/erase)
D7โ€“D4: volt, D3โ€“D0: 100 millivolt
1Ch
0036h
VCC Max. (write/erase)
D7โ€“D4: volt, D3โ€“D0: 100 millivolt
1Dh
0000h
VPP Min. voltage (00h = no VPP pin present)
1Eh
0000h
VPP Max. voltage (00h = no VPP pin present)
1Fh
0007h
Typical timeout per single byte/word write 2N ยตs
20h
0007h
Typical timeout for Min. size buffer write 2N
ยตs (00h = not supported)
21h
000Ah
Typical timeout per individual block erase 2N ms
22h
0000h
Typical timeout for full chip erase 2N ms (00h = not supported)
23h
0001h
Max. timeout for byte/word write 2N times typical
24h
0005h
Max. timeout for buffer write 2N times typical
25h
0004h
Max. timeout per individual block erase 2N times typical
26h
0000h
Max. timeout for full chip erase 2N times typical (00h = not supported)


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