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S71GLXXXNC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 68 Page - SPANSION

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์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-chip Product (MCP)
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S29GLxxxN MirrorBitTM Flash Family
S29GLxxxN_MCP_A1 December 15, 2004
Advan ce
In form ati o n
address that is either in the read or erase-suspend-read mode. The autoselect
command may not be written while the device is actively programming or
erasing.
The autoselect command sequence is initiated by first writing two unlock cycles.
This is followed by a third write cycle that contains the autoselect command. The
device then enters the autoselect mode. The system may read at any address any
number of times without initiating another autoselect command sequence:
A read cycle at address XX00h returns the manufacturer code.
Three read cycles at addresses 01h, 0Eh, and 0Fh return the device code.
A read cycle to an address containing a sector address (SA), and the address
02h on A7โ€“A0 in word mode returns 01h if the sector is protected, or 00h if
it is unprotected.
The system must write the reset command to return to the read mode (or erase-
suspend-read mode if the device was previously in Erase Suspend).
Enter Secured Silicon Sector/Exit Secured Silicon
Sector Command Sequence
The Secured Silicon Sector region provides a secured data area containing an 8-
word/16-byte random Electronic Serial Number (ESN). The system can access
the Secured Silicon Sector region by issuing the three-cycle Enter Secured Silicon
Sector command sequence. The device continues to access the Secured Silicon
Sector region until the system issues the four-cycle Exit Secured Silicon Sector
command sequence. The Exit Secured Silicon Sector command sequence returns
the device to normal operation. Table 12 shows the address and data require-
ments for both command sequences. See also โ€œSecured Silicon Sector Flash
Memory Regionโ€ for further information. Note that the ACC function and unlock
bypass modes are not available when the Secured Silicon Sector is enabled.
Word Program Command Sequence
Programming is a four-bus-cycle operation. The program command sequence is
initiated by writing two unlock write cycles, followed by the program set-up com-
mand. The program address and data are written next, which in turn initiate the
Embedded Program algorithm. The system is not required to provide further con-
trols or timings. The device automatically provides internally generated program
pulses and verifies the programmed cell margin. Table 12 shows the address and
data requirements for the word program command sequence.
When the Embedded Program algorithm is complete, the device then returns to
the read mode and addresses are no longer latched. The system can determine
the status of the program operation by using DQ7 or DQ6. Refer to the Write Op-
eration Status section for information on these status bits.
Any commands written to the device during the Embedded Program Algorithm
are ignored. Note that the Secured Silicon Sector, autoselect, and CFI
functions are unavailable when a program operation is in progress. Note
that a hardware reset immediately terminates the program operation. The pro-
gram command sequence should be reinitiated once the device has returned to
the read mode, to ensure data integrity.
Programming is allowed in any sequence of address locations and across sector
boundaries. Programming to the same word address multiple times without in-
tervening erases (incremental bit programming) requires a modified
programming method. For such application requirements, please contact your


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