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S71GLXXXNC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 85 Page - SPANSION

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์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-chip Product (MCP)
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S71GLXXXNC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 85 Page - SPANSION

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December 15, 2004 S29GLxxxN_MCP_A1
S29GLxxxN MirrorBitTM Flash Family
85
Ad vance
Info rmat i o n
Figure 5. Data# Polling Algorithm
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to VCC.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or in the erase-suspend-read
mode. Table 13 shows the outputs for RY/BY#.
DQ7 = Data?
Yes
No
No
DQ5 = 1?
No
Yes
Yes
FAIL
PASS
Read DQ7โ€“DQ0
Addr = VA
Read DQ7โ€“DQ0
Addr = VA
DQ7 = Data?
START
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = โ€œ1โ€ because
DQ7 may change simultaneously with DQ5.


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