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S71WS512NC0BAWE70 데이터시트(HTML) 26 Page - SPANSION

부품명 S71WS512NC0BAWE70
상세내용  Stacked Multi-Chip Product (MCP)
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S71WS512NC0BAWE70 데이터시트(HTML) 26 Page - SPANSION

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24
S71WS-Nx0 Based MCPs
S71WS-N_01_A4 September 15, 2005
Ad van c e
Inf o rmation
9
Product Overview
The S29WS-N family consists of 256, 128 Mbit, 1.8 volts-only, simultaneous read/write burst
mode Flash device optimized for today’s wireless designs that demand a large storage array, rich
functionality, and low power consumption.
These devices are organized in 16 or 8 Mwords of 16 bits each and are capable of continuous,
synchronous (burst) read or linear read (8-, 16-, or 32-word aligned group) with or without wrap
around. These products also offer single word programming or a 32-word buffer for programming
with program/erase and suspend functionality. Additional features include:
Advanced Sector Protection methods for protecting sectors as required
256 words of Secured Silicon area for storing customer and factory secured information. The
Secured Silicon Sector is One Time Programmable.
9.1
Memory Map
The S29WS256/128N Mbit devices consist of 16 banks organized as shown in Table 9.1–Table 9.2.
Note: This table has been condensed to show sector-related information for an entire device on a single page. Sectors and their
address ranges that are not explicitly listed (such as SA005–SA017) have sector starting and ending addresses that form the same
pattern as all other sectors of that size. For example, all 128 KB sectors have the pattern xx00000h–xxFFFFh.
Table 9.1 S29WS256N Sector & Memory Address Map
Bank
Size
Sector
Count
Sector Size
(KB)
Bank
Sector/
Sector Range
Address Range
Notes
2 MB
4
32
0
SA000
000000h–003FFFh
Contains four smaller sectors at
bottom of addressable memory.
SA001
004000h–007FFFh
SA002
008000h–00BFFFh
SA003
00C000h–00FFFFh
15
128
SA004 to SA018
010000h–01FFFFh to 0F0000h–0FFFFFh
All 128 KB sectors.
Pattern for sector address range
is xx0000h–xxFFFFh.
(see note)
2 MB
16
128
1
SA019 to SA034
100000h–10FFFFh to 1F0000h–1FFFFFh
2 MB
16
128
2
SA035 to SA050
200000h–20FFFFh to 2F0000h–2FFFFFh
2 MB
16
128
3
SA051 to SA066
300000h–30FFFFh to 3F0000h–3FFFFFh
2 MB
16
128
4
SA067 to SA082
400000h–40FFFFh to 4F0000h–4FFFFFh
2 MB
16
128
5
SA083 to SA098
500000h–50FFFFh to 5F0000h–5FFFFFh
2 MB
16
128
6
SA099 to SA114
600000h–60FFFFh to 6F0000h–6FFFFFh
2 MB
16
128
7
SA115 to SA130
700000h–70FFFFh to 7F0000h–7FFFFFh
2 MB
16
128
8
SA131 to SA146
800000h–80FFFFh to 8F0000h–8FFFFFh
2 MB
16
128
9
SA147 to SA162
900000h–90FFFFh to 9F0000h–9FFFFFh
2 MB
16
128
10
SA163 to SA178
A00000h–A0FFFFh to AF0000h–AFFFFFh
2 MB
16
128
11
SA179 to SA194
B00000h–B0FFFFh to BF0000h–BFFFFFh
2 MB
16
128
12
SA195 to SA210
C00000h–C0FFFFh to CF0000h–CFFFFFh
2 MB
16
128
13
SA211 to SA226
D00000h–D0FFFFh to DF0000h–DFFFFFh
2 MB
16
128
14
SA227 to SA242
E00000h–E0FFFFh to EF0000h–EFFFFFh
2 MB
15
128
15
SA243 to SA257
F00000h–F0FFFFh to FE0000h–FEFFFFh
4
32
SA258
FF0000h–FF3FFFh
Contains four smaller sectors at
top of addressable memory.
SA259
FF4000h–FF7FFFh
SA260
FF8000h–FFBFFFh
SA261
FFC000h–FFFFFFh


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