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S71WS512NC0BAWE70 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 17 Page - SPANSION

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์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-Chip Product (MCP)
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S71WS512NC0BAWE70 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 17 Page - SPANSION

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September 15, 2005 S71WS-N_01_A4
S71WS-Nx0 Based MCPs
15
Advance
Information
5.2
Connection Diagrams
5.2.1
1.8 V RAM Type 4 โ€“ Based Pinout
Notes:
1. In MCPs based on a single S29WS256N (S71WS256N), ball B5 is RFU. In MCPs based on two S29WS256N (S71WS512),
ball B5 is or F2-CE#.
2. Addresses are shared between Flash and RAM depending on the density of the pSRAM.
MCP
Flash-only Addresses
Shared Addresses
S71WS128NC0
A22
A21-A0
S71WS256NC0
A23-A22
A21-A0
S71WS512ND0
A23
A22-A0
A7
A3
A2
DQ8
DQ14
R-CE1#
R-LB#
F-ACC
WE#
A8
A11
C3
C4
C5
C6
C7
C8
A6
R-UB# F-RST#
RFU
A19
A12
A15
D2
D3
D4
D5
D6
D7
D8
D9
A5
A18
RDY
A20
A9
A13
A21
E2
E3
E4
E5
E6
E7
E8
E9
A1
A4
A17
A10
A14
A22
F2
F3
F4
F7
F8
F9
VSS
DQ1
A0
DQ6
RFU
A16
G3
G4
G2
G7
G8
G9
F1-CE#
DQ0
OE#
DQ9
DQ3
DQ4
DQ13
DQ15
R-MRS
H2
H3
H4
H5
H6
H7
H8
H9
DQ10
F-VCC
R-VCC
DQ12
DQ7
VSS
J2
J3
J4
J5
J6
J7
J8
J9
DQ2
DQ11
RFU
DQ5
K3
K8
K4
K5
K6
K7
RFU
A23
F5
RFU
RFU
G5
F6
G6
RFU
CLK
F2-CE#
RFU
RFU
RFU
B3
B4
B5
B6
B7
B8
RFU
RFU
F-VCC
RFU
RFU
RFU
L3
L4
L5
L6
L7
L8
B2
B9
C9
C2
K2
K9
L9
L2
AVD#
RFU
RFU
RFU
RFU
F-WP#
RFU
RFU
A1
A10
M1
M10
DNU
DNU
DNU
DNU
RAM only
Shared
Flash XIP only
Legend
Reserved for
Future Use
2nd Flash
Only
1st Flash
Only
84-ball Fine-Pitch Ball Grid Array
Type 4-based Pinout (Top View, Balls Facing Down)


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