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S29CD032G0JQAI202 데이터시트(PDF) 52 Page - SPANSION

부품명 S29CD032G0JQAI202
상세설명  32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
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50
S29CD-G Flash Family
S29CD-G_00_B0 November 14, 2005
Prel imi n ary
Common Flash Interface (CFI) Command
The Common Flash Interface (CFI) command provides device size, geometry, and capability in-
formation directly to the users system. Flash devices that support CFI, have a Query Command
that returns information about the device to the system. The Query structure contents are read
at the specific address locations following a single system write cycle where:
A 98h query command code is written to 55h address location within the device’s address
space
The device is initially in any valid read state, such as Read Array or Read ID Data
Other device statistics may exist within a long sequence of commands or data input; such se-
quences must first be completed or terminated before writing of the 98H Query command,
otherwise invalid Query data structure output may result.
Note that for data bus bits greater than DQ7 (DQ31–DQ8), the valid Query access code contains
all zeroes (0s) in the upper DQ bus locations. Thus, the 16-bit Query command code is 0098h and
the 32-bit Query command code is 00000098h.
To terminate the CFI operation, it is necessary to execute the Read/Reset command.
The CFI command is not permitted if the Secured Silicon sector is enabled and Simultaneous
Read/Write operation is disabled once the command is entered.
See Common Flash Interface (CFI) Command on page 50 for the specific CFI command codes.
Password Program Command
The Password Program Command permits programming the password that is used as part of the
hardware protection scheme. The actual password is 64-bits long. Depending upon the state of
the WORD# pin, multiple Password Program Commands are required. For a x32 bit data bus, 2
Password Program commands are required. The user must enter the unlock cycle, password pro-
gram command (38h) and the program address/data for each portion of the password when
programming. There are no provisions for entering the 2-cycle unlock cycle, the password pro-
gram command, and all the password data. There is no special addressing order required for
programming the password. Also, when the password is undergoing programming, Simultaneous
Read/Write operation is disabled. Read operations to any memory location returns the program-
ming status. Once programming is complete, the user must issue a Read/Reset command to
return the device to normal operation. Once the Password is written and verified, the Password
Mode Locking Bit must be set in order to prevent verification. The Password Program Command
is only capable of programming 0s. Programming a 1 after a cell is programmed as a 0 results in
a time-out by the Embedded Program Algorithm™ with the cell remaining as a 0. The password
is all F’s when shipped from the factory. All 64-bit password combinations are valid as a password.
Password Programming is permitted if the Secured Silicon sector is enabled.
Password Verify Command
The Password Verify Command is used to verify the Password. The Password is verifiable only
when the Password Mode Locking Bit is not programmed. If the Password Mode Locking Bit is pro-
grammed and the user attempts to verify the Password, the device always drives all F’s onto the
DQ data bus.
The Password Verify command is permitted if the Secured Silicon sector is enabled. Also, Simul-
taneous Read/Write operation is disabled when the Password Verify command is executed. Only
the password is returned regardless of the bank address. The lower two address bits (A0:A-1) are
valid during the Password Verify. Writing the Read/Reset command returns the device back to nor-
mal operation.


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