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S29CD032J0JQFI033 데이터시트(PDF) 33 Page - SPANSION |
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33 / 76 page September 27, 2006 S29CD-J_CL-J_00_B1 S29CD-J & S29CL-J Flash Family 31 Da ta Shee t (Prelim i nar y ) During the unlock bypass mode only the Read, Unlock Bypass Program and Unlock Bypass Reset commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command sequence, which returns the device to read mode. Notes 1. The Unlock Bypass Command is ignored if the Secured Silicon sector is enabled. 2. Unlike the standard program or erase commands, there is no Unlock Bypass Program/Erase Suspend or Program/Erase Resume command. 8.7.8 Simultaneous Read/Write The simultaneous read/write feature allows the host system to read data from one bank of memory while programming or erasing in another bank of memory. The Simultaneous Read/Write feature can be used to perform the following: Programming in one bank, while reading in the other bank Erasing in one bank, while reading in the other bank Programming a PPB, while reading data from the large bank or status from the small bank Erasing a PBB, while reading data from the large bank or status from the small bank Any of the above situations while in the Secured Silicon Sector Mode The Simultaneous R/W feature can not be performed during the following modes: CFI Mode Password Program operation Password Verify operation As an alternative to using the Simultaneous Read/Write feature, the user may also suspend an erase or program operation to read in another location within the same bank (except for the sector being erased). 8.8 Write Operation Status The device provides several bits to determine the status of a program or erase operation. The following subsections describe the function of DQ7, DQ6, DQ2, DQ5, DQ3, and RY/BY#. 8.8.1 DQ7: Data# Polling The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm is in progress or completed, or whether a bank is in Erase Suspend. Data# Polling is valid after the rising edge of the final WE# pulse in the command sequence. Note that Data# Polling returns invalid data for the address being programmed or erased. During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system must provide the program address to read valid status information on DQ7. If a program address falls within a protected sector, Data# polling on DQ7 is active for approximately 1 µs, then that bank returns to the read mode without programming the sector. If an erase address falls within a protected sector, Toggle BIT (DQ6) is active for 150 s, then the device returns to the read mode without erasing the sector. Please note that Data# polling (DQ7) may give misleading status when an attempt is made to program or erase a protected sector. During the Embedded Erase Algorithm, Data# polling produces a “0” on DQ7. When the Embedded Erase algorithm is complete Data# Polling produces a “1” on DQ7. The system must provide an address within any of the sectors selected for erasure to read valid status information on DQ7. In asynchronous mode, just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asynchronously with DQ6-DQ0 while Output Enable (OE#) is asserted low. That is, the device may change from providing status information to valid data on DQ7. Depending on when the system samples the DQ7 output, it may read the status or valid data. Even if the device has completed the program or erase |
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