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S71WS512NC0BAWE33 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 43 Page - SPANSION

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์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-Chip Product (MCP)
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September 15, 2005 S71WS-N_01_A4
S71WS-Nx0 Based MCPs
41
Advance
Information
Figure 10.5 Sector Erase Operation
No
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Write Sector Erase Cycles:
Address 555h, Data 80h
Address 555h, Data AAh
Address 2AAh, Data 55h
Sector Address, Data 30h
Write Additional
Sector Addresses
FAIL. Write reset command
to return to reading array.
PASS. Device returns
to reading array.
Wait 4
ยตs
(Recommended)
Perform Write Operation
Status Algorithm
Select
Additional
Sectors?
Unlock Cycle 1
Unlock Cycle 2
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Last Sector
Selected?
Done?
DQ5 = 1?
Command Cycle 1
Command Cycle 2
Command Cycle 3
Specify first sector for erasure
Error condition (Exceeded Timing Limits)
Status may be obtained by reading DQ7, DQ6 and/or DQ2.
Poll DQ3.
DQ3 = 1?
โ€ข Each additional cycle must be written within
tSEA timeout
โ€ข Timeout resets after each additional cycle is written
โ€ข The host system may monitor DQ3 or wait
tSEA to ensure
acceptance of erase commands
โ€ข No limit on number of sectors
โ€ข Commands other than Erase Suspend or selecting
additional sectors for erasure during timeout reset device
to reading array data
Notes:
1. See Table 15.1 for erase command sequence.
2. See the section on DQ3 for information on the sector erase timeout.
(see Figure 10.6)


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