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S29CD032G0JQAI012 데이터시트(PDF) 25 Page - SPANSION |
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25 / 87 page November 14, 2005 S29CD-G_00_B0 S29CD-G Flash Family 23 Pr el im i n a r y Device Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addres- sable memory location. The register is composed of latches that store the commands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Table 27 lists the device bus operations, the inputs and control levels they require, and the resulting output. The following subsections describe each of these operations in further detail. Legend: L = Logic Low = VIL, H = Logic High = VIH, X = Don’t care. Notes: 1. WP# controls the two outermost sectors of the top boot block or the two outermost sectors of the bottom boot block. 2. DQ0 reflects the sector PPB (or sector group PPB) and DQ1 reflects the DYB VersatileI/O™ (VIO) Control The VersatileI/O (VIO) control allows the host system to set the voltage levels that the device gen- erates at its data outputs and the voltages tolerated at its data inputs to the same voltage level that is asserted on the VIO pin. The output voltage generated on the device is determined based on the VIO (VCCQ) level. For the 2.6 V VCC Mask Option, a VIO of 1.65 V – 1.95 V allows the device to interface with I/Os lower than 2.5 V. Vcc = VIO (2.5 V to 2.75V) make the device appear as a 2.5 V only. Requirements for Reading Array Data To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array data to the output pins. WE# should remain at VIH. Table 27. Device Bus Operation Operation CE# OE# WE# RESET# CLK ADV# Addresses Data (DQ0–DQ31) Read L L H H X X AIN DOUT Asynchronous Write L H L H X X AIN DIN Synchronous Write L H L H AIN DIN Standby (CE#) H X X H X X X HIGH Z Output Disable L H H H X X HIGH Z HIGH Z Reset X X X L X X X HIGH Z PPB Protection Status (Note 2) L L H H X X Sector Address, A9 = VID, A7 – A0 = 02h 00000001h, (protected) A6 = H 00000000h (unprotect) A6 = L Burst Read Operations Load Starting Burst Address L X H H AIN X Advance Burst to next address with appropriate Data presented on the Data bus L L H H H X Burst Data Out Terminate Current Burst Read Cycle H X H H X X HIGH Z Terminate Current Burst Read Cycle with RESET# X X H L X X X HIGH Z Terminate Current Burst Read Cycle; Start New Burst Read Cycle L H H H AIN X |
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