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S71WS512NC0BFWE73 데이터시트(HTML) 22 Page - SPANSION

부품명 S71WS512NC0BFWE73
상세내용  Stacked Multi-Chip Product (MCP)
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제조사  SPANSION [SPANSION]
홈페이지  http://www.spansion.com
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S71WS512NC0BFWE73 데이터시트(HTML) 22 Page - SPANSION

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This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not
design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice.
Publication Number S71WS-N_01
Revision A Amendment 4 Issue Date September 15, 2005
General Description
The Spansion S29WS256/128 are MirrorbitTM Flash products fabricated on 110-nm process technology.
These burst mode Flash devices are capable of performing simultaneous read and write operations with
zero latency on two separate banks using separate data and address pins. These products can operate up
to 80 MHz and use a single VCC of 1.7 V to 1.95 V that makes them ideal for today’s demanding wireless
applications requiring higher density, better performance and lowered power consumption.
Distinctive Characteristics
Single 1.8 V read/program/erase (1.70–1.95 V)
110 nm MirrorBit™ Technology
Simultaneous Read/Write operation with zero
latency
32-word Write Buffer
Sixteen-bank architecture consisting of 16/8
Mwords for WS256N/128N, respectively
Four 16 Kword sectors at both top and bottom of
memory array
254/126 64 Kword sectors (WS256N/128N)
Programmable linear (8/16/32) with or without
wrap around and continuous burst read modes
Secured Silicon Sector region consisting of 128
words each for factory and customer
20-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector
(typical)
RDY output indicates data available to system
Command set compatible with JEDEC (42.4)
standard
Hardware (WP#) protection of top and bottom
sectors
Dual boot sector configuration (top and bottom)
Low VCC write inhibit
Persistent and Password methods of Advanced
Sector Protection
Write operation status bits indicate program and
erase operation completion
Suspend and Resume commands for Program and
Erase operations
Unlock Bypass program command to reduce
programming time
Synchronous or Asynchronous program operation,
independent of burst control register settings
ACC input pin to reduce factory programming time
Support for Common Flash Interface (CFI)
Performance Characteristics
S29WS-N MirrorBitTM Flash Family
S29WS256N, S29WS128N
256/128 Megabit (16/8 M x 16 bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst-mode Flash Memory
ADVANCE
INFORMATION
Read Access Times
Speed Option (MHz)
80
66
54
Max. Synch. Latency, ns (tIACC)
80
80
80
Max. Synch. Burst Access, ns (tBACC)
9
11.2
13.5
Max. Asynch. Access Time, ns (tACC)
80
80
80
Max CE# Access Time, ns (tCE)
80
80
80
Max OE# Access Time, ns (tOE)
13.5
13.5
13.5
Current Consumption (typical values)
Continuous Burst Read @ 80 MHz
38 mA
Simultaneous Operation (asynchronous)
50 mA
Program (asynchronous)
19 mA
Erase (asynchronous)
19 mA
Standby Mode (asynchronous)
20 µA
Typical Program & Erase Times
Single Word Programming
40 µs
Effective Write Buffer Programming (VCC) Per Word
9.4 µs
Effective Write Buffer Programming (VACC) Per Word
6 µs
Sector Erase (16 Kword Sector)
150 ms
Sector Erase (64 Kword Sector)
600 ms


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