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ADE7169F16 데이터시트(PDF) 55 Page - Analog Devices

부품명 ADE7169F16
상세설명  Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
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Preliminary Technical Data
ADE7169F16
Rev. PrD | Page 55 of 140
POS
POS
INTERRUPT STATUS REGISTERS
NEG
APSIGN Flag
NO-LOAD
THRESHOLD
ACTIVE POWER
NO-LOAD
THRESHOLD
ACTIVE ENERGY
Figure 41. Energy Accumulation in Positive-Only Accumulation Mode
Watt absolute accumulation mode
The ADE7169F16 is placed in absolute accumulation mode by
setting the ABSAM bit in the ACCMODE register (0x0F). In
absolute accumulation mode, the energy accumulation is done
using the absolute active power, ignoring any occurrence of
power below the no-load threshold, as shown in Figure 42. The
CF pulse also reflects this accumulation method when in this
mode. The default setting for this mode is off. Detection of the
transitions in the direction of power flow, and no-load
threshold are active in this mode.
POS
POS
INTERRUPT STATUS REGISTERS
NEG
APSIGN Flag
NO-LOAD
THRESHOLD
ACTIVE POWER
NO-LOAD
THRESHOLD
ACTIVE ENERGY
APNOLOAD
APNOLOAD
Figure 42. Energy Accumulation in Absolute Accumulation Mode
Active energy Pulse output
ADE7169F16 also provides all the circuitry to have a pulse
output that frequency is proportional to Active power – see
Active Power Calculation section. This pulse frequency output
uses the calibrated signal after WGAIN and its behavior is
consistent with the setting of the active energy accumulation
mode in the ACCMODE register (0x0F). The pulse output is
active low and should be preferably connected to an LED as
shown on Figure 53.
Line cycle active energy accumulation mode
In line cycle energy accumulation mode, the energy accumula-
tion of the ADE7169F16 can be synchronized to the voltage
channel zero crossing so that active energy can be accumulated
over an integral number of half line cycles. The advantage of
summing the active energy over an integer number of line
cycles is that the sinusoidal component in the active energy is
reduced to 0. This eliminates any ripple in the energy
calculation. Energy is calculated more accurately and in a
shorter time because the integration period can be shortened.
By using the line cycle energy accumulation mode, the energy
calibration can be greatly simplified, and the time required to
calibrate the meter can be significantly reduced. In line cycle
energy accumulation mode, the ADE7169F16 accumulates the
active power signal in the LWATTHR register for an integral
number of line cycles, as shown in Figure 44. The number of
half line cycles is specified in the LINCYC register. The
ADE7169F16 can accumulate active power for up to 65,535 half
line cycles. Because the active power is integrated on an integral
number of line cycles, at the end of a line cycle energy accumu-
lation cycle the CYCEND flag in the Interrupt Status Register 3
SFR (MIRQSTH, 0xDE) is set. If the CYCEND enable bit in the
Interrupt Enable Register 3 SFR (MIRQENH, 0xDB) is set, the
8052 core has a pending ADE interrupt. The ADE interrupt
stays active until the CYCEND status bit is cleared—see Energy
measurement interrupts section. Another calibration cycle will
start as soon as the CYCEND flag is set. If the LWATTHR
register is not read before a new CYCEND flag is set, the
LWATTHR register will be overwritten by a new value.
When a new half line cycles is written in LINECYC register, the
LWATTHR register is reset and a new accumulation start at the
next zero-crossing. The number of half line cycles is then
counted until LINCYC is reached . This implementation
provides a valid measurement at the first CYCEND interrupt
after writing to the LINCYC register – see Figure 43. The line
active energy accumulation uses the same signal path as the
active energy accumulation. The LSB size of these two registers
is equivalent.


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