ADM3483/ADM3485/ADM3488/ADM3490/ADM3491

Rev. B | Page 8 of 20

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

8

B

7

A

6

GND

5

ADM3483/

ADM3485

TOP VIEW

(Not to Scale)

A

8

B

7

Z

6

Y

5

ADM3488/

ADM3490

TOP VIEW

(Not to Scale)

14

13

A

12

B

11

Z

10

Y

9

NC

8

NC = NO CONNECT

ADM3491

TOP VIEW

(Not to Scale)

Figure 4. ADM3483/ADM3485 Pin Configuration

Figure 5. ADM3488/ADM3490 Pin Configuration

Figure 6. ADM3491 Pin Configuration

Table 7. Pin Function Descriptions

ADM3483/ADM3485

Pin No.

ADM3488/ADM3490

Pin No.

ADM3491

Pin No.

Mnemonic

Description

1

2

2

RO

Receiver Output. When enabled, if A > B by 200 mV, then

RO = high. If A < B by 200 mV, then RO = low.

2

N/A

3

RE

Receiver Output Enable. A low level enables the receiver

output, RO. A high level places it in a high impedance

state. If RE is high and DE is low, the device enters a low

power shutdown mode.

3

N/A

4

DE

Driver Output Enable. A high level enables the driver differential

Output A and Output B. A low level places it in a high impedance

state. If RE is high and DE is low, the device enters a low power

shutdown mode.

4

3

5

DI

Driver Input. With a half-duplex part when the driver is enabled, a

logic low on DI forces A low and B high while a logic high on

DI forces A high and B low. With a full-duplex part when the

driver is enabled, a logic low on DI forces Y low and Z high

while a logic high on DI forces Y high and Z low.

5

4

6, 7

GND

Ground.

N/A

5

9

Y

Noninverting Driver Output.

N/A

6

10

Z

Inverting Driver Output.

6

N/A

N/A

A

Noninverting Receiver Input A and Noninverting Driver

Output A.

N/A

8

12

A

Noninverting Receiver Input A.

7

N/A

N/A

B

Inverting Receiver Input B and Inverted Driver Output B.

N/A

7

11

B

Inverting Receiver Input B.

8

1

13, 14

Power Supply (3.3 V ± 0.3 V).

N/A

N/A

1, 8

NC

No Connect.