AD1970

Rev. 0 | Page 7 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NC = NO CONNECT

AD1970

TOP VIEW

(Not to Scale)

DVDD

1

RESETB

2

DGND

3

DVDD

4

RSVD

5

DGND

GPIO1

GPIO0

XIN

XOUT

36

35

34

33

32

VOUT_OAMP

6

VIN_OAMP

7

AVDD

8

BTSC_OUT

9

VID_PRES

MCLK

PLL_MODE1

PLL_MODE0

NC

31

30

29

28

27

VID_IN

PGND

26

25

13

14

15 16

17

18

19

20

21

22

23

24

48

47

46

45

44 43

42

41

40

39

38

37

Figure 2. Pin Configuration

Table 13. Pin Function Descriptions

Pin No.

Pin Name

Input/Output

Description

1

DVDD

Digital Power.

2

RESETB

IN

Reset—Active Low. After RESETB transitions from low to high, the AD1970 BTSC encoder

core goes through an initialization sequence where all registers are set to 0. The

initialization is completed after 1024 MCLK cycles. New values should not be written to

the control port until the initialization is complete.

3

DGND

Digital Ground.

4

DVDD

Digital Power. 3.3 V nominal.

5

RSVD

Reserved—Connect to DGND.

6

VOUT_OAMP

OUT

Output voltage of internal op amp to be used for BTSC output low pass filter.

7

VIN_OAMP

IN

Negative input of internal op amp to be used for BTSC output low pass filter.

8

AVDD

Analog Power.

9

BTSC_OUT

OUT

Encoded BTSC Output. The nominal output voltage for a 300 Hz, 0 dB mono input signal is

250 mV rms.

10

AGND

Analog Ground.

11

VREF

OUT

Connection for voltage reference noise reduction capacitor. The nominal VREF voltage is

1.5 V; the analog gain scales directly with the voltage on this pin. Any ac signal on this pin

causes distortion and therefore a large decoupling capacitor should be used to ensure the

voltage on VREF is clean.

12

FILTCAP

OUT

Connection for DAC noise reduction capacitor. A 10 µF capacitor should be connected to

this pin to reduce the noise on an internal DAC biasing point to provide the highest

performance. It may not be necessary to connect this pin, depending on the quality of the

layout and grounding used in the application circuit.

13

AVDD

Analog Power. 3.3 V nominal. Bypass capacitors should be placed close to the pins and

connected directly to the analog ground plane.

14

AGND

Analog Ground.

15

VOUT_IAMPL

OUT

Output of internal op amp for left channel input amplifier.

16

VIN_IAMPL

IN

Negative input of internal op amp for left channel input amplifier.

17

VOUT_IAMPR

OUT

Output of internal op amp for right channel input amplifier.