AD6624AS datasheet(11/40 Pages) AD

부품명	AD6624AS

상세설명	Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP)

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REV. B

AD6624

–11–

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Type

Function

1, 12, 38, 50, 65, 76, 102, 113

VSS

G

Ground

2–6

INB[5:1]

1

IB Input Data (Mantissa)

7, 17, 32, 44, 54, 81, 96, 118

VDD

P

2.5 V Supply

8INB0

1

IB Input Data (Mantissa)—LSB

9

IENB

2

I

Input Enable—Input B

10

LIB-B

O

Level Indicator—Input B, Interleaved—Data B

11

LIB-A

O

Level Indicator—Input B, Interleaved—Data A

13

CLK

I

Input Clock

14–16

EXPA[0:2]

1

IA Input Data (Exponent)

18–21

INA[13:10]

1

IA Input Data (Mantissa)

22, 59, 71, 86, 108, 123

VDDIO

P

3.3 V Supply

23–26

INA[9:6]

1

IA Input Data (Mantissa)

27, 39, 64, 91, 103, 128

VSSIO

G

Ground

28–31

INA[5:2]

1

IA Input Data (Mantissa)

33–34

INA[1:0]

1

IA Input Data (Mantissa)

35

IENA

2

I

Input Enable—Input A

36

LIA-B

O

Level Indicator—Input A, Interleaved—Data B

37

LIA-A

O

Level Indicator—Input A, Interleaved—Data A

40

SYNCD

1

IAll Sync Pins Go to All Four Output Channels

41

SYNCC

1

IAll Sync Pins Go to All Four Output Channels

42

SYNCB

1

IAll Sync Pins Go to All Four Output Channels

43

SYNCA

1

IAll Sync Pins Go to All Four Output Channels

45

RESET

IActive Low Reset Pin

46–49

D[7:4]

I/O/T

Bidirectional Microport Data

51–53

D[3:1]

I/O/T

Bidirectional Microport Data

55

D0

I/O/T

Bidirectional Microport Data—LSB

56

DS(RD)I

Active Low Data Strobe (Active Low Read)

57

DTACK(RDY)2

O/T

Active Low Data Acknowledge (Microport Status Bit)

58

RW(

WR)I

Read Write (Active Low Write)

60

MODE

I

Intel or Motorola Mode Select

61–63

A[2:0]

I

Microport Address Bus

66

CS1

IChip Select

67

TRST2

ITest Reset Pin

68

TCLK

1

ITest Clock Input

69

TMS

2

ITest Mode Select Input

70

TDO

O/T

Test Data Output

72

TDI

2

ITest Data Input

73–75

CHIP_ID[3:1]

1

IChip ID Selector

77

CHIP_ID0

1

IChip ID Selector—LSB

78

SBM0

1

I

Serial Bus Master—Channel 0 Only

79–80

SDIV[3:2]

1

I

Serial Clock Divisor—Channel 0

82–83

SDIV[1:0]

1

I

Serial Clock Divisor—Channel 0

84

SCLK0

1

I/O

Bidirectional Serial Clock—Channel 0

85

SDFS0

1

I/O

Bidirectional Serial Data Frame Sync—Channel 0

87

SDO0

1

O/T

Serial Data Output—Channel 0

88

SDIN0

1

I

Serial Data Input—Channel 0

89

SDFE0

O

Serial Data Frame End—Channel 0

90

DR0

O

Output Data Ready Indicator—Channel 0

유사한 부품 번호 - AD6624AS

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD6624AS/PCB	636Kb / 40P	Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) REV. 0

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유사한 설명 - AD6624AS

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD6624A	636Kb / 40P	Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) REV. 0
	AD6624	566Kb / 40P	Four-Channel, 80 MSPS Digital Receive Signal Processor REV. B
	AD6635	799Kb / 60P	4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) REV. 0
	AD6634	925Kb / 52P	80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) REV. 0
	AD6624A	642Kb / 40P	Four-Channel, 100 MSPS Digital Receive Signal Processor REV. 0
	AD6634	931Kb / 52P	80 MSPS, Dual-Channel WCDMA Receive Signal Processor REV. 0
	AD6635	805Kb / 60P	4-Channel, 80 MSPS WCDMA Receive Signal Processor REV. 0
	AD6620ASZ	374Kb / 44P	67 MSPS Digital Receive Signal Processor REV. A
	AD6620	354Kb / 43P	65 MSPS Digital Receive Signal Processor REV. 0
	AD6620	399Kb / 44P	67 MSPS Digital Receive Signal Processor REV. A

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AD6624AS 데이터시트(PDF) 11 Page - Analog Devices

AD6624AS 데이터시트(HTML) 11 Page - Analog Devices

유사한 부품 번호 - AD6624AS

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