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CDB61581 데이터시트(PDF) 3 Page - Cirrus Logic |
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CDB61581 데이터시트(HTML) 3 Page - Cirrus Logic |
3 / 16 page CDB61581 DS211DB2 3 1. POWER SUPPLY As shown on the evaluation board schematic in Figure 1, power is supplied to the board from an ex- ternal +5 Volt supply connected to the two binding posts labeled V+ and GND. Zener diode Z1 pro- tects the components on the board from reversed supply connections and over-voltage damage. Ca- pacitor C1 provides power supply decoupling and ferrite bead L1 helps isolate the CS61581 and buff- er supplies. Capacitors C4, C5 and C6 provide power supply decoupling for the CS61581. The buffer U2 is decoupled using capacitor C15. Ferrite bead L7 helps isolates the devices U2, U3 and U4. 2. BOARD CONFIGURATION Slide switch S1 selects hardware, host or hardware- coder mode operation by sliding it into HW, SW or HWCDR positions, respectively. 2.1. Hardware Mode In Hardware mode operation, the evaluation board is configured using the DIP switch SW1. In this mode, the switch establishes the digital control in- puts for both line interface channels. Closing a DIP switch away from the label sets the CS61581 con- trol pin of the same name to a logic 1. The host pro- cessor interface J1 should not be used in the Hardware mode. The CDB61581 switches and functions are listed below: - TAOS: transmit all ones; - LLOOP: local loopback; - RLOOP: remote loopback; - JASEL: jitter attenuator path selection; - LBO1, LBO2: line build out settings. All switch inputs are pulled-high using resistor net- work RN1. 2.1.1. Network Loopback NLOOP is enabled in the hardware mode by clos- ing HDR11 (HW_NLOOP) and then pressing S2. It can also be done by sliding the switches RLOOP, LLOOP and TAOS on SW1 towards the labels, pulling them high, and then pulling them back to low by sliding RLOOP, LLOOP and TAOS to OFF (away from the labels), in that order. NLOOP can then be turned on by sending 1-in-5 pattern on the RTIP and RRING pins for five seconds. The NLOOP LED will light up at this point if HDR6 is jumped to NLOOP_LED position. NLOOP can be turned off by sending a 1-in-3 pattern on the pins RTIP and RRING or five seconds. 2.2. Hardware-Coder Mode This mode is essentially the same as the Hardware mode with the B8ZS or HDB3 encoder/decoder en- abled. 2.3. Host Mode In Host mode operation, the evaluation board sup- ports serial-port operation over interface port J1 us- ing the printer port of a host PC running the enclosed software. The evaluation board is con- nected to the host PC using a DB-25 male-to-male cable (included). Ferrite beads L2-L6 help reduce incoming noise from the host interface. The SW1 switch must be open (all switches slid away from the labels) to enable serial-port operation. An external microprocessor may also interface to the evaluation board to facilitate system software development. The CS61581 interrupt pin, INT, is |
유사한 부품 번호 - CDB61581 |
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유사한 설명 - CDB61581 |
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