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IDT74LVC573A 데이터시트(PDF) 2 Page - Integrated Device Technology |
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IDT74LVC573A 데이터시트(HTML) 2 Page - Integrated Device Technology |
2 / 6 page INDUSTRIALTEMPERATURERANGE 2 IDT74LVC573A 3.3VCMOSOCTALTRANSPARENTD-TYPELATCH Symbol Description Max Unit VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK Continuous Clamp Current, –50 mA IOK VI < 0 or VO < 0 ICC Continuous Current through each ±100 mA ISS VCC or GND ABSOLUTE MAXIMUM RATINGS(1) NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PIN CONFIGURATION SOIC/ SSOP/ QSOP/ TSSOP TOP VIEW NOTE: 1. As applicable to the device type. Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 5.5 8 pF CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF CAPACITANCE (TA= +25°C, F = 1.0MHz) 2 3 1 1 D VCC 16 15 14 5 Q 4 Q 6 Q 2 Q 1 Q 3 Q 11 8 Q 7 Q LE 19 18 20 17 13 12 OE 5 6 6 D 7 4 D 5 D 4 2 D 3 D 8 9 GND 10 7 D 8 D NOTES: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High-Impedance 2. Output level before the indicated steady-state input conditions were established. Inputs Outputs xD LE OE xQ HH L H LH L L XL L Q(2) XX H Z FUNCTION TABLE (EACH LATCH)(1) Pin Names Description OE Output Enable Inputs (Active LOW) LE Latch Enable Input xD Data Inputs xQ 3-State Data Outputs PIN DESCRIPTION |
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