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74F543PC 데이터시트(PDF) 2 Page - Fairchild Semiconductor

부품명 74F543PC
상세설명  Octal Registered Transceiver
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제조업체  FAIRCHILD [Fairchild Semiconductor]
홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74F543PC 데이터시트(HTML) 2 Page - Fairchild Semiconductor

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Unit Loading/Fan Out
Functional Description
The F543 contains two sets of eight D-type latches, with
separate input and output controls for each set. For data
flow from A to B, for example, the A-to-B Enable (CEAB)
input must be LOW in order to enter data from A0–A7 or
take data from B0–B7, as indicated in the Data I/O Control
Table. With CEAB LOW, a LOW signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent;
a subsequent LOW-to-HIGH transition of the LEAB signal
puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB
both LOW, the 3-STATE B output buffers are active and
reflect the data present at the output of the A latches. Con-
trol of data flow from B to A is similar, but using the CEBA,
LEBA and OEBA inputs.
Data I/O Control Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA and OEBA
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
OEAB
A-to-B Output Enable Input (Active LOW)
1.0/1.0
20
µA/−0.6 mA
OEBA
B-to-A Output Enable Input (Active LOW)
1.0/1.0
20
µA/−0.6 mA
CEAB
A-to-B Enable Input (Active LOW)
1.0/2.0
20
µA/−1.2 mA
CEBA
B-to-A Enable Input (Active LOW)
1.0/2.0
20
µA/−1.2 mA
LEAB
A-to-B Latch Enable Input (Active LOW)
1.0/1.0
20
µA/−0.6 mA
LEBA
B-to-A Latch Enable Input (Active LOW)
1.0/1.0
20
µA/−0.6 mA
A0–A7
A-to-B Data Inputs or
3.5/1.083
70
µA/−650 µA
B-to-A 3-STATE Outputs
150/40 (33.8)
−3 mA/24 mA (20 mA)
B0–B7
B-to-A Data Inputs or
3.5/1.083
70
µA/−650 µA
A-to-B 3-STATE Outputs
600/106.6 (80)
−12 mA/64 mA (48 mA)
Inputs
Latch
Output
CEAB
LEAB
OEAB
Status
Buffers
H
X
X
Latched
High Z
X
H
X
Latched
L
L
X
Transparent
XX
H
High Z
LX
L
Driving


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