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SN74ABT18646PMG4 데이터시트(PDF) 8 Page - Texas Instruments |
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SN74ABT18646PMG4 데이터시트(HTML) 8 Page - Texas Instruments |
8 / 13 page SN74ABT18646 SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER SCBS131A – AUGUST 1992 – REVISED JANUARY 2002 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (test mode) (see Note 4 and Figure 2)123 MIN MAX UNIT fclock Clock frequency TCK 50 MHz tw Pulse duration TCK high or low 8 ns A, B, CLK, DIR, OE, or S before TCK ↑ 4.5 tsu Setup time TDI before TCK ↑ 7.5 ns TMS before TCK ↑ 3 A or B after TCK ↑ 0.5 th Hold time CLK, DIR, OE, or S after TCK ↑ 0 ns th Hold time TDI after TCK ↑ 0.5 ns TMS after TCK ↑ 0.5 td Delay time Power up to TCK ↑ 50 ns tr Rise time VCC power up 1 µs NOTE 4: Preliminary specifications based on SPICE analysis switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (normal mode) (see Note 4 and Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX UNIT fmax CLKAB or CLKBA 100 MHz tPLH AorB BorA 2 5.4 ns tPHL A or B B or A 2 6.6 ns tPLH CLKAB or CLKBA BorA 2.5 8 ns tPHL CLKAB or CLKBA B or A 2.5 7.4 ns tPLH SAB or SBA BorA 2 7.5 ns tPHL SAB or SBA B or A 2 8 ns tPZH DIR BorA 2 8 ns tPZL DIR B or A 3 9.1 ns tPZH OE BorA 2.5 8.6 ns tPZL OE B or A 3 9.3 ns tPHZ DIR BorA 3.5 11.1 ns tPLZ DIR B or A 3 8.8 ns tPHZ OE BorA 3.5 10.5 ns tPLZ OE B or A 2 8.5 ns NOTE 4: Preliminary specifications based on SPICE analysis |
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