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CS5101 데이터시트(PDF) 1 Page - ON Semiconductor

부품명 CS5101
상세설명  Secondary Side Post Regulator for AC/DC and DC/DC Multiple Output Converters
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제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5101 데이터시트(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 6
1
Publication Order Number:
CS5101/D
CS5101
Secondary Side Post
Regulator for AC/DC and
DC/DC Multiple Output
Converters
The CS5101 is a bipolar monolithic secondary side post regulator
(SSPR) which provides tight regulation of multiple output voltages in
AC/DC or DC/DC converters. Leading edge pulse width modulation
is used with the CS5101.
The CS5101 is designed to operate over an 8.0 V to 45 V supply
voltage (VCC) range and up to a 75 V drive voltage (VC).
The CS5101 features include a totem pole output with 1.5 A peak
output current capability, externally programmable overcurrent
protection, an on chip 2.0% precision 5.0 V reference, internally
compensated error amplifier, externally synchronized switching
frequency, and a power switch drain voltage monitor. It is available in
a 14 lead plastic DIP or a 16 lead wide body SOIC package.
Features
1.5 A Peak Output (Grounded Totem Pole)
8.0 V to 75 V Gate Drive Voltage
8.0 V to 45 V Supply Voltage
300 ns Propagation Delay
1.0% Error Amplifier Reference Voltage
Lossless Turn On and Turn Off
Sleep Mode: < 100 mA
Overcurrent Protection with Dedicated Differential Amp
Synchronization to External Clock
External Power Switch Drain Voltage Monitor
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
1
14
1
16
http://onsemi.com
PDIP−14
N SUFFIX
CASE 646
MARKING DIAGRAMS AND
PIN ASSIGNMENTS
SO−16WB
DW SUFFIX
CASE 751G
1
16
SO−16WB
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
VD
SYNC
1
VC
VCC
VG
VREF
PGND
LGND
IS COMP
VFB
IS−
COMP
IS+
RAMP
14
IS+
RAMP
1
16
IS−
COMP
IS COMP
VFB
PGND
AGND
PGND
DGND
VG
VREF
VC
VCC
VD
SYNC
PDIP−14


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