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CS51221EDTB16G 데이터시트(PDF) 6 Page - ON Semiconductor |
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CS51221EDTB16G 데이터시트(HTML) 6 Page - ON Semiconductor |
6 / 14 page CS51221 http://onsemi.com 6 PACKAGE PIN DESCRIPTION Package Pin # Pin Symbol Function 1 GATE External power switch driver with 1.0 A peak capability. Rail to rail output occurs when the capacitive load is between 470 pF and 10 nF. 2 ISENSE Current sense comparator input. 3 SYNC Bidirectional synchronization. Locks to highest frequency. 4 FF PWM ramp. 5 UV Undervoltage protection monitor. 6 OV Overvoltage protection monitor. 7 RTCT Timing resistor RT and capacitor CT determine oscillator frequency and maximum duty cycle, DMAX. 8 ISET Voltage at this pin sets pulse−by−pulse overcurrent threshold. 9 VFB Feedback voltage input. Connected to the error amplifier inverting input. 10 COMP Error amplifier output. 11 SS Charging external capacitor restricts error amplifier output voltage during the power up or fault conditions. 12 LGND Logic ground. 13 VREF 3.3 V reference voltage output. Decoupling capacitor can be selected from 0.01 mF to 10 mF. 14 VCC Logic supply voltage. 15 PGND Output power stage ground. 16 VC Output power stage supply voltage. |
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