CS2841B

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6

CIRCUIT DESCRIPTION

Undervoltage Lockout

During Undervoltage Lockout (Figure 5), the output

driver is biased to a high impedance state. The output should

be shunted to ground with a resistor to prevent output

leakage current from activating the power switch.

Figure 5. Typical Undervoltage Characteristics

ON/OFF Command

to Reset of IC

7.4 V

8.0 V

< 15 mA

< 1.0 mA

PWM Waveform

To generate the PWM waveform, the control voltage from

the error amplifier is compared to a current sense signal

representing the peak output inductor current (Figure 6). An

increase, thus reducing the duty cycle. This is an inherent

feed−forward characteristic of current mode control, since

the control voltage does not have to change during changes

of input supply voltage.

Figure 6. Timing Diagram for Key CS2841B

Parameters

Switch

Current

EA Output

OSC

RESET

OSC

When the power supply sees a sudden large output current

increase, the control voltage will increase allowing the duty

cycle to momentarily increase. Since the duty cycle tends to

exceed the maximum allowed to prevent transformer

saturation in some power supplies, the internal oscillator

waveform provides the maximum duty cycle clamp as

programmed by the selection of OSC components.

Figure 7. Oscillator Timing Network and

Parameters

Internal Clock

Triangular Mode

Internal Clock

Sawtooth Mode

Timing Parameters

OSC

GND

Setting the Oscillator

During the discharge time, the internal clock signal blanks

out the output to the Low state, thus providing a user selected

maximum duty cycle clamp. Charge and discharge times are

determined by the general formulas: