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MC34261D 데이터시트(PDF) 7 Page - ON Semiconductor |
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MC34261D 데이터시트(HTML) 7 Page - ON Semiconductor |
7 / 13 page MC34261, MC33261 http://onsemi.com 7 With the component values shown in Figure 16, the Current Sense Comparator threshold, at the peak of the haversine varies from 1.1 V at 90 Vac to 100 mV at 268 Vac. The Current Sense Input to Drive Output propagation delay is typically 200 ns. Timer A watchdog timer function was added to the IC to eliminate the need for an external oscillator when used in stand alone applications. The Timer provides a means to automatically start or restart the preconverter if the Drive Output has been off for more than 400 μs after the inductor current reaches zero. Undervoltage Lockout An Undervoltage Lockout comparator guarantees that the IC is fully functional before enabling the output stage. The positive power supply terminal (VCC) is monitored by the UVLO comparator with the upper threshold set at 10 V and the lower threshold at 8.0 V (Figure 14). In the standby mode, with VCC at 7.0 V, the required supply current is less than 0.5 mA (Figure 13). This hysteresis and low startup current allow the implementation of efficient bootstrap startup techniques, making these devices ideally suited for wide input range off line preconverter applications. An internal 36 V clamp has been added from VCC to ground to protect the IC and capacitor C5 from an overvoltage condition. This feature is desirable if external circuitry is used to delay the startup of the preconverter. Output The MC34261/MC33261 contain a single totem pole output stage specifically designed for direct drive of power MOSFETs. The Drive Output is capable of up to ±500 mA peak current with a typical rise and fall time of 50 ns with a 1.0 nF load. Additional internal circuitry has been added to keep the Drive Output in a sinking mode whenever the Undervoltage Lockout is active. This characteristic eliminates the need for an external gate pull−down resistor. The totem pole output has been optimized to minimize cross conduction current during high speed operation. The addition of two 10 Ω resistors, one in series with the source output transistor and one in series with the sink output transistor, reduces the cross conduction current, as shown in Figure 12. A 16 V clamp has been incorporated into the output stage to limit the high state VOH. This prevents rupture of the MOSFET gate when VCC exceeds 20 V. Table 1. Design Equations Notes Calculation Formula Calculate the maximum required output power. Required Converter Output Power PO = VO IO Calculated at the minimum required ac line for regula- tion. Let the efficiency n = 0.95. Peak Inductor Current IL(pk) = 22 PO ηVac(LL) Let the switching cycle t = 20 μs. Inductance L = 2t 2 VO Vac(LL) IL(pk) VO − Vac Vac2 In theory the on−time ton is constant. In practice ton tends to increase at the ac line zero crossings due to the charge on capacitor C6. Switch On−Time η Vac2 ton = 2 PO L The off−time toff is greatest at peak ac line and approaches zero at the ac line zero crossings. Theta (θ) represents the angle of the ac line voltage. Switch Off−Time VO − 1 toff = 2 Vac ⎪Sin θ⎜ ton The minimum switching frequency occurs at peak ac line and increases as toff decreases. Switching Frequency f = ton + toff 1 Set the current sense threshold VCS to 1.0 V for universal input (85 Vac to 265 Vac) operation and to 0.5 V for fixed input (92 Vac to 138 Vac, or 184 to 276 Vac) operation. Peak Switch Current R9 = IL(pk) VCS Set the multiplier input voltage VM to 3.0 V at high line. Empirically adjust VM for the lowest distortion over the ac line range while guaranteeing startup at minimum line. Multiplier Input Voltage + 1 Vac VM = R7 2 R3 The IIB R1 error term can be minimized with a divider current in excess of 100 μA. Converter Output Voltage − IIB R2 VO = Vref R2 + 1 R1 The bandwidth is typically set to 20 Hz for minimum output ripple over the ac line haversine. Error Amplifier Bandwidth BW = R1 R2 1 R1 + R2 2 π C1 The following converter characteristics must be chosen: VO IO Vac Vac(LL) − Desired output voltage − AC RMS line voltage − Desired output current − AC RMS low line voltage |
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