전자부품 데이터시트 검색엔진 |
|
MC10EP57DTR2G 데이터시트(PDF) 2 Page - ON Semiconductor |
|
MC10EP57DTR2G 데이터시트(HTML) 2 Page - ON Semiconductor |
2 / 11 page MC10EP57, MC100EP57 http://onsemi.com 2 Figure 1. 20−Lead Package (Top View) and Logic Diagram D1 D1 D2 D0 17 18 16 15 14 13 12 4 3 5678 9 SEL0 11 10 VCC Q VCC VBB1 VBB2 VEE D0 19 20 2 1 VCC SEL1 D2 VCC D3 VEE D3 4:1 Q Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. 1 2 3 4 5 15 14 13 12 11 67 8 9 10 20 19 18 17 16 Figure 1. QFN−20 Pinout (Top View) SEL0 VCC Q VCC SEL1 VCC Q VCC VBB2 VBB1 VEE D1 D1 D2 D0 D0 D2 D3 D3 VEE Exposed Pad NOTE: The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit. The Exposed Pad may only be electrically connected to VEE. MC10/100EP57 Table 1. PIN DESCRIPTION PIN FUNCTION D0 − 3*, D0 − 3* ECL Differential Data Inputs SEL0*, SEL1* ECL MUX Select Inputs VBB1, VBB2 ECL Reference Output Voltage Q, Q ECL Data Outputs VCC Positive Supply VEE Negative Supply EP Exposed Pad *Pins will default LOW when left open. Table 2. TRUTH TABLE SEL1 SEL0 DATA OUT L L D0, D0 L H D1, D1 H L D2, D2 H H D3, D3 |
유사한 부품 번호 - MC10EP57DTR2G |
|
유사한 설명 - MC10EP57DTR2G |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |