전자부품 데이터시트 검색엔진 |
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MC10H113 데이터시트(PDF) 1 Page - ON Semiconductor |
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MC10H113 데이터시트(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2006 February, 2006 − Rev. 8 1 Publication Order Number: MC10H113/D MC10H113 Quad Exclusive OR Gate Description The MC10H113 is a Quad Exclusive OR Gate with an enable common to all four gates. The outputs may be wire−ORed together to perform a 4−bit comparison function (A = B). The enable is active LOW. Features • Propagation Delay, 1.3 ns Typical • Power Dissipation 175 mW Typ/Pkg (No Load) • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K™ Compatible • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. CDIP−16 L SUFFIX CASE 620A MARKING DIAGRAMS* PDIP−16 P SUFFIX CASE 648 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ORDERING INFORMATION SOEIAJ−16 CASE 966 16 1 16 1 MC10H113P AWLYYWWG 1 16 MC10H113L AWLYYWW A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G= Pb−Free Package 10H113 ALYWG PLLC−20 FN SUFFIX CASE 775 20 1 10H113G AWLYYWW 120 |
유사한 부품 번호 - MC10H113_06 |
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유사한 설명 - MC10H113_06 |
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