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MC100LVEL30 데이터시트(PDF) 5 Page - ON Semiconductor

부품명 MC100LVEL30
상세설명  3.3V ECL Triple D Flip?묯lop with Set and Reset
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제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100LVEL30 데이터시트(HTML) 5 Page - ON Semiconductor

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MC100LVEL30
http://onsemi.com
5
ORDERING INFORMATION
Device
Package
Package
MC100LVEL30DW
SOIC−20
38 Units / Rail
MC100LVEL30DWG
SOIC−20
(Pb−Free)
38 Units / Rail
MC100LVEL30DWR2
SOIC−20
1000 / Tape & Reel
MC100LVEL30DWR2G
SOIC−20
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPS I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices


유사한 부품 번호 - MC100LVEL30_06

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