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NCP302 데이터시트(HTML) 1 Page - ON Semiconductor

부품명 NCP302
상세내용  Voltage Detector Series with Programmable Delay
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NCP302 데이터시트(HTML) 1 Page - ON Semiconductor

 
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© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 19
1
Publication Order Number:
NCP302/D
NCP302, NCP303
Voltage Detector Series
with Programmable Delay
The NCP302 and NCP303 series are second generation ultra−low
current voltage detectors that contain a programmable time delay
generator. These devices are specifically designed for use as reset
controllers in portable microprocessor based systems where extended
battery life is paramount.
Each series features a highly accurate undervoltage detector with
hysteresis and an externally programmable time delay generator. This
combination of features prevents erratic system reset operation.
The NCP302 series consists of complementary output devices that
are available with either an active high or active low reset. The
NCP303 series has an open drain N−Channel output with an active low
reset output.
Features
Quiescent Current of 0.5 mA Typical
High Accuracy Undervoltage Threshold of 2.0%
Externally Programmable Time Delay Generator
Wide Operating Voltage Range of 0.8 V to 10 V
Complementary or Open Drain Output
Active Low or Active High Reset
Specified Over the −40°C to +125°C Temperature Range
(Except for Voltage Options from 0.9 to 1.1 V)
Pb−Free Packages are Available
Typical Applications
Microprocessor Reset Controller
Low Battery Detection
Power Fail Indicator
Battery Backup Detection
Figure 1. Representative Block Diagrams
This device contains 28 active transistors.
NCP303LSNxxT1
Open Drain Output Configuration
NCP302xSNxxT1
Complementary Output Configuration
* Inverter for active low devices.
* Buffer for active high devices.
Vref
2
Input
1
Reset
Output
3
GND 5CD
RD
*
Vref
2
Input
3
GND 5CD
RD
1
Reset Output
See detailed ordering and shipping information in the ordering
information section on page 22 of this data sheet.
ORDERING INFORMATION
TSOP−5/
SOT23−5
CASE 483
PIN CONNECTIONS
1
3
N.C.
Reset
Output
2
Input
Ground
4
CD
5
(Top View)
http://onsemi.com
1
5
xxx AYW
G
G
MARKING
DIAGRAM
xxx
= Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
1
5
(Note: Microdot may be in either location)


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