AD7400YRWZ-REEL datasheet(4/20 Pages) AD

부품명	AD7400YRWZ-REEL

상세설명	Isolated Sigma-Delta Modulator

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AD7400

Rev. A | Page 4 of 20

TIMING SPECIFICATIONS

VDD1 = 4.5 V to 5.25 V, VDD2 = 3 V to 5.5 V, TA = TMAX to TMIN, unless otherwise noted.1

Table 2.

Parameter

Limit at TMIN, TMAX

Unit

Description

fMCLKOUT2

10

MHz typ

Master clock output frequency

9/11

MHz min/MHz max

Master clock output frequency

t13

40

ns max

Data access time after MCLK rising edge

t23

10

ns min

Data hold time after MCLK rising edge

t3

0.4 × tMCLKOUT

ns min

Master clock low time

t4

0.4 × tMCLKOUT

ns min

Master clock high time

1 Sample tested during initial release to ensure compliance.

2 Mark space ratio for clock output is 40/60 to 60/40.

3 Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0.8 V or 2.0 V.

200µA

IOL

200µA

IOH

+1.6V

TO OUTPUT

CL

25pF

Figure 2. Load Circuit for Digital Output Timing Specifications

MCLKOUT

MDAT

t1

t2

t4

t3

Figure 3. Data Timing

유사한 부품 번호 - AD7400YRWZ-REEL

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD7400YRWZ-REEL	395Kb / 20P	Isolated Sigma-Delta Modulator Rev. H
Analog Devices	AD7400YRWZ-REEL7	395Kb / 20P	Isolated Sigma-Delta Modulator Rev. H

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유사한 설명 - AD7400YRWZ-REEL

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD7401	347Kb / 20P	Isolated Sigma-Delta Modulator REV. D
	AD7401A	551Kb / 20P	Isolated Sigma-Delta Modulator Rev. D
	AD7400	951Kb / 10P	Isolated Sigma-Delta Modulator Rev. PrH
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	AD7401	462Kb / 20P	Isolated Sigma-Delta Modulator REV. 0
	AD7401	422Kb / 18P	Isolated Sigma-Delta Modulator Rev. F
	AD7401A	436Kb / 20P	Isolated Sigma-Delta Modulator REV. 0
	AD7401_0612	460Kb / 20P	Isolated Sigma-Delta Modulator Rev. A
	AD7400A	326Kb / 19P	Isolated Sigma-Delta Modulator Rev. PrA
	AD7400A	400Kb / 18P	Isolated Sigma-Delta Modulator Rev. E

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AD7400YRWZ-REEL 데이터시트(PDF) 4 Page - Analog Devices

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유사한 부품 번호 - AD7400YRWZ-REEL

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