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FBL2031 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - NXP Semiconductors

๋ถ€ํ’ˆ๋ช… FBL2031
์ƒ์„ธ๋‚ด์šฉ  9-bit BTL 3.3V latched/registered/pass-thru Futurebus transceiver
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์ œ์กฐ์‚ฌ  PHILIPS [NXP Semiconductors]
ํ™ˆํŽ˜์ด์ง€  http://www.nxp.com
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FBL2031 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
FBL2031
9-bit BTL 3.3V latched/registered/pass-thru
Futurebus+ transceiver
2000 Apr 18
6
LOGIC DIAGRAM
Decode
Out
In
46
45
OEB0
OEB1
47
OEA
14
A8
DQ
Clk
24
B8
38
18
LCAB
20
SEL0
28
30
32
34
36
BTL
TMS
TCK
TDI
TDO
42
44
22
21
(JTAG Boundary Scan pins)
LOGIC GND
=
1, 3, 5, 7, 9, 11, 13, 51
BUS GND
=
25, 27, 29, 31, 33, 35, 37, 39, 41
BIAS V
=
48
VCC
=
23, 43, 49
BG VCC
=17
BG GND
=
19
DQ
E
MUX
A
โ‡’ B
QD
MUX
A
โ‡’ B
26
B7
12
A7
MUX
A
โ‡ B
52
10
8
6
4
2
TTL
A1
MUX
A
โ‡’ B
MUX
A
โ‡ B
B1
40
50
MUX
A
โ‡’ B
MUX
A
โ‡ B
B0
DQ
Clk
DQ
E
DQ
Clk
DQ
E
D
Q
Clk
D
Q
E
D
Q
Clk
D
Q
E
D
Q
E
DQ
E
DQ
Clk
D
Q
Clk
D
Q
E
15
SEL1
16
LCBA
D
Q
Clk
MUX
A
โ‡ B
A0
SG00061


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