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TPL9201NE4 데이터시트(PDF) 4 Page - Texas Instruments

부품명 TPL9201NE4
상세설명  8-CHANNEL RELAY DRIVER WITH INTEGRATED 5-V LDO AND ZERO-VOLT DETECTION
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DETAILED DESCRIPTION
TPL9201
8-CHANNEL RELAY DRIVER
WITH INTEGRATED 5-V LDO AND ZERO-VOLT DETECTION
SLIS123B – JUNE 2006 – REVISED NOVEMBER 2006
The 5-V regulator is powered from VIN, and the regulated output is within 5 V ±5% over the operating conditions.
The open-drain power-on reset (RST) pin remains low until the regulator exceeds the set threshold, and the
timer value set by the capacitor on the reset delay (RDELAY) pin expires. If both of these conditions are satisfied,
RST is asserted high. This signifies to the microcontroller that serial communications can be initiated to the
TPL9201.
The serial communications is an 8-bit format, with data transfer synchronized using a serial clock from the
microcontroller. A single register controls all the outputs (one bit per output). The default value is zero (OFF). If
an output requires pulse width modulation (PWM) function, the register must be updated at a rate faster than the
desired PWM frequency. OUT1 can be controlled by serial input from the microcontroller or with the dedicated
enable (EN1) pin. If EN1 is pulled low or left open, the serial input through the shift register controls OUT1. If
EN1 is pulled high, OUT1 always is turned on, and the serial input for OUT1 is ignored.
The SYN input translates the image of the mains voltage through the secondary of the transformer. The SYN
input has a resistor to protect from high currents into the IC. The zero-voltage synchronization output translates
the AC-line cycle frequency into a low-frequency clock, which can be used for a timing reference and to help
power loads on the AC-line peak voltage (to reduce in-rush currents).
If RST is asserted, all outputs are turned OFF internally, and the input register is reset to all zeroes. The
microcontroller must write to the register to turn the outputs ON again.
4
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