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IRFP460 데이터시트(PDF) 5 Page - NXP Semiconductors |
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IRFP460 데이터시트(HTML) 5 Page - NXP Semiconductors |
5 / 7 page Philips Semiconductors Product specification PowerMOS transistors IRFP460 Avalanche energy rated Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); parameter VDS Fig.14. Typical switching times; t d(on), tr, td(off), tf = f(RG) Fig.15. Normalised drain-source breakdown voltage; V (BR)DSS/V(BR)DSS 25 ˚C = f(Tj) Fig.16. Source-Drain diode characteristic. I F = f(VSDS); parameter Tj Fig.17. Maximum permissible non-repetitive avalanche current (I AS) versus avalanche time (tp); unclamped inductive load Fig.18. Maximum permissible repetitive avalanche current (I AR) versus avalanche time (tp) PHW20N50E 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 25 50 75 100 125 150 175 200 Gate charge, QG (nC) Gate-source voltage, VGS (V) ID = 20A Tj = 25 C VDD = 400 V 200V 300V PHW20N50E 0 5 10 15 20 25 30 35 40 45 50 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 Drain-Source Voltage, VSDS (V) Source-Drain Diode Current, IF (A) Tj = 25 C 150 C VGS = 0 V PHW20N50E 0 100 200 300 400 500 600 0 5 10 15 20 25 30 Gate resistance, RG (Ohms) Switching times, td(on), tr, td(off), tf (ns) td(off) tr, tf td(on) PHW20N50E 1 10 100 1E-06 1E-05 1E-04 1E-03 1E-02 Avalanche time, tp (s) Non-repetitive Avalanche current, IAS (A) 125 C VDS ID tp Tj prior to avalanche = 25 C -100 -50 0 50 100 150 0.85 0.9 0.95 1 1.05 1.1 1.15 Tj, Junction temperature (C) Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C PHW20N50E 0.1 1 10 100 1E-06 1E-05 1E-04 1E-03 1E-02 Avalanche time, tp (s) Maximum Repetitive Avalanche Current, IAR (A) 125 C Tj prior to avalanche = 25 C September 1999 5 Rev 1.000 |
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