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AM29F800B ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 3 Page - Advanced Micro Devices

๋ถ€ํ’ˆ๋ช… AM29F800B
์ƒ์„ธ๋‚ด์šฉ  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory
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์ œ์กฐ์‚ฌ  AMD [Advanced Micro Devices]
ํ™ˆํŽ˜์ด์ง€  http://www.amd.com
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DATA SHEET
This Data Sheet states AMDโ€™s current technical specifications regarding the Product described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 21504
Rev: E Amendment: 5
Issue Date: November 2, 2006
Am29F800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
โ–  Single power supply operation
โ€” 5.0 Volt-only operation for read, erase, and
program operations
โ€” Minimizes system level requirements
โ–  Manufactured on 0.32 ยตm process technology
โ€” Compatible with 0.5 ยตm Am29F800 device
โ–  High performance
โ€” Access times as fast as 55 ns
โ–  Low power consumption (typical values at
5 MHz)
โ€” 1 ยตA standby mode current
โ€” 20 mA read current (byte mode)
โ€” 28 mA read current (word mode)
โ€” 30 mA program/erase current
โ–  Flexible sector architecture
โ€” One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
โ€” One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
โ€” Supports full chip erase
โ€” Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
โ€” Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
โ–  Top or bottom boot block configurations
available
โ–  Embedded Algorithms
โ€” Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
โ€” Embedded Program algorithm automatically
writes and verifies data at specified addresses
โ–  Minimum 1,000,000 program/erase cycles per
sector guaranteed
โ–  20-year data retention at 125ยฐC
โ€” Reliable operation for the life of the system
โ–  Package option
โ€” 48-pin TSOP
โ€” 44-pin SO
โ€” 48-ball FBGA
โ€” Known Good Die (KGD)
(see publication number 21631)
โ–  Compatibility with JEDEC standards
โ€” Pinout and software compatible with single-
power-supply Flash
โ€” Superior inadvertent write protection
โ–  Data# Polling and toggle bits
โ€” Provides a software method of detecting
program or erase operation completion
โ–  Ready/Busy# pin (RY/BY#)
โ€” Provides a hardware method of detecting
program or erase cycle completion
โ–  Erase Suspend/Erase Resume
โ€” Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
โ–  Hardware reset pin (RESET#)
โ€” Hardware method to reset the device to reading
array data


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