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AM29LV400B ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 4 Page - Advanced Micro Devices

๋ถ€ํ’ˆ๋ช… AM29LV400B
์ƒ์„ธ๋‚ด์šฉ  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory
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์ œ์กฐ์‚ฌ  AMD [Advanced Micro Devices]
ํ™ˆํŽ˜์ด์ง€  http://www.amd.com
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Am29LV400B Known Good Die
SU PP L E ME NT
GENERAL DESCRIPTION
The Am29LV400B in Known Good Die (KGD) form is
an 4 Mbit, 3.0 volt-only Flash memory. AMD defines
KGD as standard product in die form, tested for function-
ality and speed. AMD KGD products have the same reli-
ability and quality as AMD products in packaged form.
Am29LV400B Features
The Am29LV400B is an 4 Mbit, 3.0 volt-only Flash
memory organized as 524,288 bytes or 262,144 words.
The word-wide data (x16) appears on DQ15โ€“DQ0; the
byte-wide (x8) data appears on DQ7โ€“DQ0. To elimi-
nate bus contention the device has separate chip
enable (CE#), write enable (WE#) and output enable
(OE#) controls.
The device requires only a single 3.0 volt power
supply for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations. No VPP is required for
program or erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program algorithmโ€”an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin. The Unlock Bypass mode facili-
tates faster programming times by requiring only two
write cycles to program data instead of four.
Device erasure o ccu rs by executin g th e era se
command sequence. This initiates the Embedded
Erase algorithmโ€”an internal algorithm that automati-
cally preprograms the array (if it is not already pro-
grammed) before executing the erase operation.
During erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
VCC detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of
memory. This can be achieved in-system or via pro-
gramming equipment.
The Erase Suspend feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The hardware RESET# terminates any operation in
progress and resets the internal state machine to
reading array data. The RESET# may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
The system can also place the device into the standby
mode. Power consumption is greatly reduced in both
these modes.
AMDโ€™s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a s e ct o r simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron injec-
tion.
Electrical Specifications
Refer to the Am29LV400B data sheet, publication
number 21523, for full electrical specifications on the
Am29LV400B in KGD form.


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AM29F400B_064 Megabit 512 K x 8-Bit/256 K x 16-Bit CMOS 5.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV160B_0516 Megabit 2 M x 8-Bit/1 M x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV800B_058 Megabit 1 M x 8-Bit/512 K x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV200B_062 Megabit 256 K x 8-Bit/128 K x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV004B_064 Megabit 512 K x 8-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29DL400B_054 Megabit 512 K x 8-Bit/256 K x 16-Bit CMOS 3.0 Volt-only Simultaneous Operation Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29F400B_034 Megabit 512 K x 8-Bit/256 K x 16-Bit CMOS 5.0 Volt-only Boot Sector Flash Memory-Die Revision 2 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV160D_0616 Megabit 2 M x 8-Bit/1 M x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV800B_038 Megabit 1 M x 8-Bit/512 K x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory- Die Revision 2 1 2 3 4 5 MoreAdvanced Micro Devices
AM29LV640D_0764 Megabit 4 M x 16-Bit CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOโ„ข Control 1 2 3 4 5 MoreAdvanced Micro Devices

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