전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AM41DL6408G 데이터시트(PDF) 27 Page - Advanced Micro Devices

부품명 AM41DL6408G
상세설명  64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
Download  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM41DL6408G 데이터시트(HTML) 27 Page - Advanced Micro Devices

Back Button AM41DL6408G Datasheet HTML 23Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 24Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 25Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 26Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 27Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 28Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 29Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 30Page - Advanced Micro Devices AM41DL6408G Datasheet HTML 31Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 27 / 63 page
background image
26
Am41DL6408G
August 19, 2002
P R E L I M INARY
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device op-
erations. Table 14 defines the valid register command
sequences. Writing incorrect address and data val-
ues or writing them in the improper sequence resets
the device to reading array data.
All addresses are latched on the falling edge of WE#
or CE#f, whichever happens later. All data is latched
on the rising edge of WE# or CE#f, whichever hap-
pens first. Refer to the AC Characteristics section for
timing diagrams.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. Each bank is ready to read array data
after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command,
th e corresponding bank en te rs th e erase-sus-
pend-read mode, after which the system can read
data from any non-erase-suspended sector within the
same bank. The system can read array data using the
standard read timing, except that if it reads at an ad-
dress within erase-suspended sectors, the device out-
puts status data. After completing a programming
operation in the Erase Suspend mode, the system
may once again read array data with the same excep-
tion. See the Erase Suspend/Erase Resume Com-
mands section for more information.
The system must issue the reset command to return a
bank to the read (or erase-suspend-read) mode if DQ5
goes high during an active program or erase opera-
tion, or if the bank is in the autoselect mode. See the
next section, Reset Command, for more information.
See also Requirements for Reading Array Data in the
section for more information. The Flash Read-Only
Operations table provides the read parameters, and
Figure 14 shows the timing diagram.
Reset Command
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the bank to which the sys-
tem was writing to the read mode. Once erasure be-
gins, however, the device ignores reset commands
until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to the read mode. If the
program command sequence is written to a bank that
is in the Erase Suspend mode, writing the reset
co mmand re turn s th at ban k to the era se- su s-
pend-read mode. Once programming begins, how-
ever, the device ignores reset commands until the
operation is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must be written to return to the read mode. If a bank
entered the autoselect mode while in the Erase Sus-
pend mode, writing the reset command returns that
bank to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to the
read mode (or erase-suspend-read mode if that bank
was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
The autoselect command sequence may be written to
an address within a bank that is either in the read or
erase-suspend-read mode. The autoselect command
may not be written while the device is actively pro-
gramming or erasing in the other bank.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the au-
toselect command. The bank then enters the autose-
lect mode. The system may read any number of
autoselect codes without reinitiating the command se-
quence.
Table 14 shows the address and data requirements.
To determine sector protection information, the system
must write to the appropriate bank address (BA) and
sector address (SADD). Table 5 shows the address
range and bank number associated with each sector.
The system must write the reset command to return to
the read mode (or erase-suspend-read mode if the
bank was previously in Erase Suspend).
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence
The SecSi Sector region provides a secured data area
containing a random, sixteen-byte electronic serial
number (ESN). The system can access the SecSi
Sector region by issuing the three-cycle Enter SecSi
Sector command sequence. The device continues to
access the SecSi Sector region until the system is-
sues the four-cycle Exit SecSi Sector command se-


유사한 부품 번호 - AM41DL6408G

제조업체부품명데이터시트상세설명
logo
SPANSION
AM41DL6408G SPANSION-AM41DL6408G Datasheet
1Mb / 63P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408G70IS SPANSION-AM41DL6408G70IS Datasheet
1Mb / 63P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408G70IT SPANSION-AM41DL6408G70IT Datasheet
1Mb / 63P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408G71IS SPANSION-AM41DL6408G71IS Datasheet
1Mb / 63P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM41DL6408G71IT SPANSION-AM41DL6408G71IT Datasheet
1Mb / 63P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
More results

유사한 설명 - AM41DL6408G

제조업체부품명데이터시트상세설명
logo
Advanced Micro Devices
AM42DL640AG AMD-AM42DL640AG Datasheet
916Kb / 62P
   64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Static RAM
AM41DL3208G AMD-AM41DL3208G Datasheet
1Mb / 65P
   32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
AM49DL640BG AMD-AM49DL640BG Datasheet
1Mb / 62P
   64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (512 K x 16-Bit) Pseudo Static RAM
AM42DL6404G AMD-AM42DL6404G Datasheet
1,022Kb / 61P
   64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM
AM41DL16X4D AMD-AM41DL16X4D Datasheet
980Kb / 63P
   16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
AM29DL800B AMD-AM29DL800B Datasheet
580Kb / 43P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL800B AMD-AM29DL800B_06 Datasheet
1Mb / 46P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
logo
SPANSION
AM42DL6402G SPANSION-AM42DL6402G Datasheet
927Kb / 62P
   64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM
AM49DL640BH SPANSION-AM49DL640BH Datasheet
1Mb / 63P
   64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
logo
Advanced Micro Devices
AM41DL32X8G AMD-AM41DL32X8G Datasheet
1Mb / 66P
   32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com