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전자부품 데이터시트 검색엔진 |
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AM29BDS643G 데이터시트(HTML) 26 Page - Advanced Micro Devices |
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AM29BDS643G 데이터시트(HTML) 26 Page - Advanced Micro Devices |
26 / 49 page ![]() 24 Am29BDS643G 25692A2 May 8, 2006 D A TA SH EE T When the Embedded Erase algorithm is complete, the bank returns to reading array data and addresses are no longer latched. Note that while the Embedded Erase operation is in progress, the system can read data from the non-erasing bank. The system can determine the status of the erase operation by reading DQ7 or DQ6/ DQ2 in the erasing bank. Refer to the Write Operation Status section for information on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other commands are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the sector erase command sequence should be reinitiated once that bank has returned to reading array data, to ensure data integrity. The host system may also initiate the sector erase command sequence while the device is in the unlock bypass mode. The command sequence is four cycles cycles in length instead of six cycles. Figure 2 illustrates the algorithm for the erase opera- tion. Refer to the Erase/Program Operations table in the AC Characteristics section for parameters, and Figure 14 section for timing diagrams. Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the sys- tem to interrupt a sector erase operation and then read data from, program data to, any sector not selected for erasure. The system may also lock or unlock any sec- tor while the erase operation is suspended. The sys- te m mu st not write the sector lock /unlock command to sectors selected for erasure. The bank address is required when writing this command. This command is valid only during the sector erase op- eration, including the minimum 50 µs time-out period during the sector erase command sequence. The Erase Suspend command is ignored if written during the chip erase operation or Embedded Program algorithm. When the Erase Suspend command is written during the sector erase operation, the device requires a maximum of 20 µs to suspend the erase operation. However, when the Erase Suspend command is written during the sector erase time-out, the device immedi- ately terminates the time-out period and suspends the erase operation. After the erase operation has been suspended, the bank enters the erase-suspend-read mode. The system can read data from or program data to any sector not selected for erasure. (The device “erase sus- pends” all sectors selected for erasure.) The system may also lock or unlock any sector while in the erase-suspend-read mode. Reading at any address within erase-suspended sectors produces status infor- mation on DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2 together, to determine if a sector is actively erasing or is erase-suspended. Refer to the Write Operation Status section for information on these status bits. After an erase-suspended program operation is com- plete, the bank returns to the erase-suspend-read mode. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard program operation. Refer to the Write Operation Status section for more information. In the erase-suspend-read mode, the system can also issue the autoselect command sequence. Refer to the Autoselect Functions and Autoselect Command Sequence sections for details. To resume the sector erase operation, the system must write the Erase Resume command. The bank address of the erase-suspended bank is required when writing this command. Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the chip has resumed erasing. Figure 2. Erase Operation START Write Erase Command Sequence Data Poll from System Data = FFh? No Yes Erasure Completed Embedded Erase algorithm in progress Notes: 1. See Table 10 for erase command sequence. 2. See the section on DQ3 for information on the sector erase timer. |