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AM41PDS3224DB35IS 데이터시트(PDF) 56 Page - Advanced Micro Devices

부품명 AM41PDS3224DB35IS
상세설명  32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM
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제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM41PDS3224DB35IS 데이터시트(HTML) 56 Page - Advanced Micro Devices

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May 13, 2002
Am41PDS3224D
55
P R E L IMINARY
FLASH ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°C, 2.0 V V
CC, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90
°C, V
CC = 1.8 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table
10 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
FLASH LATCHUP CHARACTERISTICS
Note: Includes all pins except V
CC. Test conditions: VCC = 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Note: 7.Test conditions TA = 25°C, f = 1.0 MHz.
FLASH DATA RETENTION
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
1
10
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
93
sec
Word Program Time
16
360
µs
Excludes system level
overhead (Note 5)
Accelerated Byte/Word Program Time
5
µs
Chip Program Time
(Note 3)
Word Mode
20
100
Description
Min
Max
Input voltage with respect to V
SS on all pins except I/O pins
(including OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS on all I/O pins
–1.0 V
V
CC + 1.0 V
V
CC Current
–100 mA
+100 mA
Parameter
Symbol
Description
Test Setup
Typ
Max
Unit
CIN
Input Capacitance
VIN = 0
1114pF
C
OUT
Output Capacitance
V
OUT = 0
1216pF
CIN2
Control Pin Capacitance
VIN = 0
1416pF
C
IN3
WP#/ACC Pin Capacitance
V
IN = 0
1720pF
Parameter Description
Test Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°C
10
Years
125
°C
20
Years


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