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AM29BDS320GBC4VMI ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 16 Page - SPANSION

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์ƒ์„ธ๋‚ด์šฉ  32 Megabit (2 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
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14
Am29BDS320G
27243B1 October 1, 2003
Prelimin ary
boundary while the device is programming or erasing, the device will provide read
status information. The clock will be ignored. After the host has completed status
reads, or the device has completed the program or erase operation, the host can
restart a burst operation using a new address and AVD# pulse.
If the clock frequency is less than 6 MHz during a burst mode operation, addi-
tional latencies will occur. RDY indicates the length of the latency by pulsing low.
8-, 16-, and 32-Word Linear Burst with Wrap Around
The remaining three modes are of the linear wrap around design, in which a fixed
number of words are read from consecutive addresses. In each of these modes,
the burst addresses read are determined by the group within which the starting
address falls. The groups are sized according to the number of words read in a
single burst sequence for a given mode (see Table 2.)
Table 2. Burst Address Groups
As an example: if the starting address in the 8-word mode is 39h, the address
range to be read would be 38-3Fh, and the burst sequence would be 39-3A-3B-
3C-3D-3E-3F-38h-etc. The burst sequence begins with the starting address writ-
ten to the device, but wraps back to the first address in the selected group. In a
similar fashion, the 16-word and 32-word Linear Wrap modes begin their burst
sequence on the starting address written to the device, and then wrap back to
the first address in the selected address group. Note that in these three burst
read modes the address pointer does not cross the boundary that occurs
every 64 words; thus, no wait states are inserted (except during the ini-
tial access).
The RDY pin indicates when data is valid on the bus. The devices can wrap
through a maximum of 128 words of data (8 words up to 16 times, 16 words up
to 8 times, or 32 words up to 4 times) before requiring a new synchronous access
(latching of a new address).
Burst Mode Configuration Register
The device uses a configuration register to set the various burst parameters:
number of wait states, burst read mode, active clock edge, RDY configuration,
and synchronous mode active.
Reduced Wait-State Handshaking Option
The device can be equipped with a reduced wait-state handshaking feature that
allows the host system to simply monitor the RDY signal from the device to de-
termine when the initial word of burst data is ready to be read. The host system
should use the programmable wait state configuration to set the number of wait
states for optimal burst mode operation. The initial word of burst data is indicated
by the rising edge of RDY after OE# goes low.
The presence of the reduced wait-state handshaking feature may be verified by
writing the autoselect command sequence to the device. See โ€œAutoselect Com-
mand Sequenceโ€ for details.
Mode
Group Size
Group Address Ranges
8-word
8 words
0-7h, 8-Fh, 10-17h, ...
16-word
16 words
0-Fh, 10-1Fh, 20-2Fh, ...
32-word
32 words
00-1Fh, 20-3Fh, 40-5Fh, ...


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