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LAN9115 데이터시트(PDF) 64 Page - SMSC Corporation

부품명 LAN9115
상세설명  Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller
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제조업체  SMSC [SMSC Corporation]
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Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
64
SMSC LAN9115
DATASHEET
4.2.2
Scrambling
Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large
narrow-band peaks. Scrambling the data helps eliminate these peaks and spread the signal power
more uniformly over the entire channel bandwidth. This uniform spectral density is required by FCC
regulations to prevent excessive EMI from being radiated by the physical wiring.
The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.
4.2.3
NRZI and MLT3 Encoding
The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a
serial 125MHz NRZI data stream. The NRZI is encoded to MLT-3. MLT3 is a tri-level code where a
change in the logic level represents a code bit “1” and the logic output remaining at the same level
represents a code bit “0”.
4.2.4
100M Transmit Driver
The MLT3 data is then passed to the analog transmitter, which launches the differential MLT-3 signal,
on outputs TXP and TXN, to the twisted pair media via a 1:1 ratio isolation transformer. The 10Base-
T and 100Base-TX signals pass through the same transformer so that common “magnetics” can be
used for both. The transmitter drives into the 100
Ω impedance of the CAT-5 cable. Cable termination
and impedance matching require external components.
4.2.5
100M Phase Lock Loop (PLL)
The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz
logic and the 100Base-Tx Transmitter.
01000
V
INVALID, RX_ER if during RX_DV
INVALID
01100
V
INVALID, RX_ER if during RX_DV
INVALID
10000
V
INVALID, RX_ER if during RX_DV
INVALID
Table 4.1 4B/5B Code Table (continued)
CODE
GROUP
SYM
RECEIVER
INTERPRETATION
TRANSMITTER
INTERPRETATION


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