© 2004 Fairchild Semiconductor Corporation

DS009560

www.fairchildsemi.com

April 1988

Revised January 2004

74F30

8-Input NAND Gate

General Description

This device contains a single gate, which performs the

logic NAND function.

Ordering Code:

Note 1: Devices also available in Tape and Reel. Specify by appending the letter “X” to the ordering code.

Logic Symbol

IEEE/IEC

Unit Loading/Fan Out

Connection Diagram

Function Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

X

= Immaterial

Order Number

Package Number

Package Description

74F30SC

(Note 1)

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74F30SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F30PC

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Pin Names Description

U.L.

Inputs

1.0/1.0

20

µA/−0.6 mA

O

Output

50/33.3

−1 mA/20 mA

Inputs

Output

O

L

XXX

XXX

X

H

X

L

XX

XXX

X

H

X

X

L

X

XXX

X

H

X

X

X

L

XXX

X

H

X

XXX

L

X

X

X

H

X

XXX

X

L

X

X

H

X

XXX

XX

L

X

H

X

XXX

XXX

L

H

HHH

HHH

HH

L