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AD8213YRMZ 데이터시트(PDF) 10 Page - Analog Devices |
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AD8213YRMZ 데이터시트(HTML) 10 Page - Analog Devices |
10 / 16 page AD8213 Rev. 0 | Page 10 of 16 THEORY OF OPERATION In typical applications, the AD8213 amplifies a small differential input voltage generated by the load current flowing through a shunt resistor. The AD8213 rejects high common-mode voltages (up to 65 V) and provides a ground referenced, buffered output that interfaces with an analog-to-digital converter (ADC). Figure 25 shows a simplified schematic of the AD8213. The following explanation refers exclusively to Channel 1 of the AD8213, however, the same explanation applies to Channel 2. A load current flowing through the external shunt resistor produces a voltage at the input terminals of the AD8213. The input terminals are connected to Amplifier A1 by Resistor R1(1) and Resistor R1(2). The inverting terminal, which has very high input impedance is held to (VCM) – (ISHUNT × RSHUNT), since negligible current flows through Resistor R1(2). Amplifier A1 forces the noninverting input to the same potential. Therefore, the current that flows through Resistor R1(1), is equal to IIN1 = (ISHUNT1 × RSHUNT1)/R1(1) This current (IIN1) is converted back to a voltage via ROUT1. The output buffer amplifier has a gain of 20 V/V, and offers excellent accuracy as the internal gain setting resistors are precision trimmed to within 0.01% matching. The resulting output voltage is equal to VOUT1 = (ISHUNT1 × RSHUNT1) × 20 Prior to the buffer amplifier, a precision-trimmed 20 kΩ resistor is available to perform low-pass filtering of the input signal prior to the amplification stage. This means that the noise of the input signal is not amplified, but rejected, resulting in a more precise output signal that will directly interface with a converter. A capacitor from the CF1 pin to GND, will result in a low-pass filter with a corner frequency of () FILTER dB C f 20000 2 1 3 π = − A2 G = +20 PROPRIETARY OFFSET CIRCUITRY CF2 OUT2 = (ISHUNT2 × RSHUNT2) × 20 A1 G = +20 RSHUNT1 RSHUNT2 ISHUNT1 ISHUNT2 PROPRIETARY OFFSET CIRCUITRY CF1 GND OUT1 = (ISHUNT1 × RSHUNT1) × 20 V+ AD8213 20kΩ 20kΩ Q2 R2 (1) R2 (2) R1 (1) R1 (2) Q1 ROUT2 ROUT1 IIN2 IIN1 Figure 25. Simplified Schematic |
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