전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

LS7061C 데이터시트(PDF) 2 Page - LSI Computer Systems

부품명 LS7061C
상세설명  32 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
Download  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  LSI [LSI Computer Systems]
홈페이지  http://www.lsicsi.com
Logo LSI - LSI Computer Systems

LS7061C 데이터시트(HTML) 2 Page - LSI Computer Systems

  LS7061C Datasheet HTML 1Page - LSI Computer Systems LS7061C Datasheet HTML 2Page - LSI Computer Systems LS7061C Datasheet HTML 3Page - LSI Computer Systems LS7061C Datasheet HTML 4Page - LSI Computer Systems LS7061C Datasheet HTML 5Page - LSI Computer Systems LS7061C Datasheet HTML 6Page - LSI Computer Systems LS7061C Datasheet HTML 7Page - LSI Computer Systems  
Zoom Inzoom in Zoom Outzoom out
 2 / 7 page
background image
SCAN COUNTER AND DECODER
The scan counter is reset to the least significant byte position
(State 1) when SCAN RESET input is brought low for a mini-
mum of 10ns. The scan counter is enabled for counting as long
as the ENABLE input is held low. The counter advances to the
next significant byte position on each negative transition of the
SCAN pulse. When the scan counter advances to State 5 for
the LS7060C or Stage 6 for the LS7061C it disables the Output
Drivers and stops in that state until SCAN RESET is again
brought low.
SCAN
When the scan counter is enabled, each negative transition of
this input advances the scan counter to its next state. When
SCAN is low the Data Outputs are disabled. When SCAN is
brought high the Data Outputs are enabled and present the
latched counter data corresponding to the present state of the
scan counter. Therefore, in microprocessor applications, the
Data Output Bus may be utilized for other activities while new
data is propagating to the outputs. This positive SCAN pulse
can be viewed as a "Place the next byte on my bus" instruction
from the microprocessor. Minimum positive and negative pulse
widths of 10ns for the SCAN signal are required for scan
counter operation.
SCAN RESET/LOAD
When this input is brought low for a minimum of 10ns, the scan
counter is reset to State 1, the least significant byte position,
and the latches are simultaneously loaded with new count
information.
ENABLE
When this input is high, the scan counter and the Data Outputs are
disabled. When ENABLE is low, the scan counter and Data Outputs
are enabled for normal operation. Transition of this input should
only be made while the SCAN input is in a low state in order to pre-
vent false clocking of the scan counter.
CASCADE ENABLE
This output is normally high. It transitions low and stays low when
the scan counter advances to State 5 for LS7060C and State 6 for
LS7061C. In a multiple counter system this output is connected to
the ENABLE input of the next counter in the cascade string. The
SCAN input and SCAN RESET/LOAD input are carried to all the
counters in the "Cascade". Counter 1 then presents its bytes of data
to the Output Bus on each positive transition of the SCAN pulse as
previously discussed. When State 5 for LS7060C or State 6 for
LS7061C of Counter 1 is achieved, Counter 2 presents its data to
the Output Bus. This sequence continues until all counters in the
cascade have been addressed. See Figure 5 for an illustration of a
3 device cascade design. This output is TTL and CMOS
compatible.
THREE-STATE DATA OUTPUT DRIVERS
The eight Data Output Drivers are disabled when either ENABLE
input is high, the scan counter is in State 5 for LS7060C and State 6
for LS7061C, or the SCAN input is low. The Output Drivers are TTL
and Bus compatible.
ABSOLUTE MAXIMUM RATINGS:
PARAMETER
SYMBOL
VALUE
UNIT
StorageTemperature
TSTG
-55 to +150
°C
Operating Temperature
TA
0 to +70
°C
Voltage (any pin to VSS)
VIN
+10 to -0.3
V
DC ELECTRICAL CHARACTERISTICS:
(VDD = +5V ± 5%, VSS = 0V, TA = 0˚C to +70˚C unless otherwise noted.)
PARAMETER
SYMBOL
MIN
MAX
UNIT
CONDITIONS
Quiescent Power Supply
IDD
-
0.5
mA
VDD = Max, Outputs No Load,
Current
Ø Frequency
Power Supply Current
IDD
4
-
mA
15 MHz Operating Frequency
VDD = Max, Outputs No Load
Power Supply Current
IDD
-
8
mA
At Maximum Operating Frequency
VDD = Max, Outputs No Load
Input High Voltage
VIH
+3.5
VDD
V
-
Input Low Voltage
VIL
0
+0.6
V
-
Output High Voltage
CASCADE ENABLE
VOH
+2.4
-
V
IO = -6mA, VDD = Min
B0 - B7
VOH
+2.4
-
V
IO = -33mA, VDD = Min
Output Low Voltage
CASCADE ENABLE
VOL
-
+0.4
V
IO = 3mA, VDD = Min
B0 - B7
VOL
-
+0.4
V
IO = 10mA, VDD = Min
Output Source Current
Isource
-34
-
mA
VO = +1.2V, VDD = Min
B0 - B7 Outputs
-36
-
mA
VO = +0.8V, VDD = Min
-38
-
mA
VO = +0.4V, VDD = Min
Output Sink Current
Isink
25
-
mA
VO = +1.2V, VDD = Min
B0 - B7 Outputs
20
-
mA
VO = +0.8V, VDD = Min
10
-
mA
VO = +0.4V, VDD = Min
Output Leakage Current
IOL
-
10
nA
VO = +.4V to +2.4V, VDD = Min
B0 - B7 (Off State)
Input Capacitance
CIN
-
6
pF
TA = 25˚C, f = 1MHz
Output Capacitance
COUT
-
12
pF
TA = 25˚C, f = 1MHz
Input Leakage Current
ILI
-
10
nA
VDD = Max
ENABLE, RESET, SCAN
7060C/61C-012102-2


유사한 부품 번호 - LS7061C

제조업체부품명데이터시트상세설명
logo
LSI Computer Systems
LS7061 LSI-LS7061 Datasheet
68Kb / 7P
   32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
More results

유사한 설명 - LS7061C

제조업체부품명데이터시트상세설명
logo
LSI Computer Systems
LS7060 LSI-LS7060_03 Datasheet
83Kb / 6P
   32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7060 LSI-LS7060 Datasheet
64Kb / 7P
   32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7061 LSI-LS7061 Datasheet
68Kb / 7P
   32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
logo
Motorola, Inc
SN54LS569A MOTOROLA-SN54LS569A Datasheet
260Kb / 8P
   FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS
logo
National Semiconductor ...
54F579 NSC-54F579 Datasheet
197Kb / 8P
   8-Bit Bidirectional Binary Counter with TRI-STATE Outputs
54F779 NSC-54F779 Datasheet
176Kb / 8P
   8-Bit Bidirectional Binary Counter with TRI-STATE Outputs
logo
Renesas Technology Corp
HD74HC590 RENESAS-HD74HC590_15 Datasheet
143Kb / 12P
   8-bit Binary Counter/Register (with 3-state outputs)
logo
Texas Instruments
74AC11590 TI1-74AC11590_09 Datasheet
144Kb / 10P
[Old version datasheet]   8-BIT BINARY COUNTER WITH REGISTERED 3-STATE OUTPUTS
logo
Fairchild Semiconductor
74F579 FAIRCHILD-74F579_00 Datasheet
84Kb / 8P
   8-Bit Bidirectional Binary Counter with 3-STATE Outputs
logo
Hitachi Semiconductor
HD74HC590 HITACHI-HD74HC590 Datasheet
66Kb / 11P
   8-bit Binary Counter/Register (with 3-state outputs)
More results


Html Pages

1 2 3 4 5 6 7


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com